drivers/gpu/drm/xe/xe_drm_ras.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/xe/xe_drm_ras.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/xe/xe_drm_ras.c
Extension
.c
Size
5142 bytes
Lines
205
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: MIT
/*
 * Copyright © 2026 Intel Corporation
 */

#include <linux/bitmap.h>

#include <drm/drm_managed.h>
#include <drm/drm_print.h>
#include <drm/drm_ras.h>

#include "xe_device_types.h"
#include "xe_drm_ras.h"

static const char * const error_components[] = DRM_XE_RAS_ERROR_COMPONENT_NAMES;
static const char * const error_severity[] = DRM_XE_RAS_ERROR_SEVERITY_NAMES;

static int hw_query_error_counter(struct xe_drm_ras_counter *info,
				  u32 error_id, const char **name, u32 *val)
{
	if (!info || !info[error_id].name)
		return -ENOENT;

	*name = info[error_id].name;
	*val = atomic_read(&info[error_id].counter);

	return 0;
}

static int hw_clear_error_counter(struct xe_drm_ras_counter *info, u32 error_id)
{
	if (!info || !info[error_id].name)
		return -ENOENT;

	atomic_set(&info[error_id].counter, 0);

	return 0;
}

static int query_uncorrectable_error_counter(struct drm_ras_node *ep, u32 error_id,
					     const char **name, u32 *val)
{
	struct xe_device *xe = ep->priv;
	struct xe_drm_ras *ras = &xe->ras;
	struct xe_drm_ras_counter *info = ras->info[DRM_XE_RAS_ERR_SEV_UNCORRECTABLE];

	return hw_query_error_counter(info, error_id, name, val);
}

static int clear_uncorrectable_error_counter(struct drm_ras_node *node, u32 error_id)
{
	struct xe_device *xe = node->priv;
	struct xe_drm_ras *ras = &xe->ras;
	struct xe_drm_ras_counter *info = ras->info[DRM_XE_RAS_ERR_SEV_UNCORRECTABLE];

	return hw_clear_error_counter(info, error_id);
}

static int query_correctable_error_counter(struct drm_ras_node *ep, u32 error_id,
					   const char **name, u32 *val)
{
	struct xe_device *xe = ep->priv;
	struct xe_drm_ras *ras = &xe->ras;
	struct xe_drm_ras_counter *info = ras->info[DRM_XE_RAS_ERR_SEV_CORRECTABLE];

	return hw_query_error_counter(info, error_id, name, val);
}

static int clear_correctable_error_counter(struct drm_ras_node *node, u32 error_id)
{
	struct xe_device *xe = node->priv;
	struct xe_drm_ras *ras = &xe->ras;
	struct xe_drm_ras_counter *info = ras->info[DRM_XE_RAS_ERR_SEV_CORRECTABLE];

	return hw_clear_error_counter(info, error_id);
}

static struct xe_drm_ras_counter *allocate_and_copy_counters(struct xe_device *xe)
{
	struct xe_drm_ras_counter *counter;
	int i;

	counter = drmm_kcalloc(&xe->drm, DRM_XE_RAS_ERR_COMP_MAX, sizeof(*counter), GFP_KERNEL);
	if (!counter)
		return ERR_PTR(-ENOMEM);

	for (i = DRM_XE_RAS_ERR_COMP_CORE_COMPUTE; i < DRM_XE_RAS_ERR_COMP_MAX; i++) {
		if (!error_components[i])
			continue;

Annotation

Implementation Notes