drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c- Extension
.c- Size
- 28108 bytes
- Lines
- 1070
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
drm/drm_managed.hregs/xe_guc_regs.habi/guc_actions_sriov_abi.hxe_bo.hxe_ggtt.hxe_gt.hxe_gt_sriov_pf.hxe_gt_sriov_pf_config.hxe_gt_sriov_pf_control.hxe_gt_sriov_pf_migration.hxe_gt_sriov_printk.hxe_guc.hxe_guc_buf.hxe_guc_ct.hxe_migrate.hxe_mmio.hxe_sriov.hxe_sriov_packet.hxe_sriov_packet_types.hxe_sriov_pf_helpers.hxe_sriov_pf_migration.h
Detected Declarations
function pf_dump_mig_datafunction pf_migration_ggtt_sizefunction pf_save_vf_ggtt_mig_datafunction pf_restore_vf_ggtt_mig_datafunction xe_gt_sriov_pf_migration_ggtt_savefunction xe_gt_sriov_pf_migration_ggtt_restorefunction guc_action_vf_save_restorefunction pf_send_guc_query_vf_mig_data_sizefunction pf_send_guc_save_vf_mig_datafunction pf_send_guc_restore_vf_mig_datafunction pf_migration_supportedfunction pf_save_vf_guc_mig_datafunction pf_migration_guc_sizefunction xe_gt_sriov_pf_migration_guc_savefunction pf_restore_vf_guc_statefunction xe_gt_sriov_pf_migration_guc_restorefunction pf_migration_mmio_sizefunction pf_migration_mmio_savefunction pf_migration_mmio_restorefunction pf_save_vf_mmio_mig_datafunction pf_restore_vf_mmio_mig_datafunction xe_gt_sriov_pf_migration_mmio_savefunction xe_gt_sriov_pf_migration_mmio_restorefunction pf_migration_vram_sizefunction pf_save_vram_chunkfunction pf_save_vf_vram_mig_datafunction pf_restore_vf_vram_mig_datafunction xe_gt_sriov_pf_migration_vram_savefunction xe_gt_sriov_pf_migration_vram_restorefunction xe_gt_sriov_pf_migration_sizefunction xe_gt_sriov_pf_migration_ring_emptyfunction xe_gt_sriov_pf_migration_ring_fullfunction xe_gt_sriov_pf_migration_ring_freefunction pf_migration_save_data_todofunction xe_gt_sriov_pf_migration_save_initfunction xe_gt_sriov_pf_migration_save_data_pendingfunction xe_gt_sriov_pf_migration_save_data_completefunction xe_gt_sriov_pf_migration_save_producefunction xe_gt_sriov_pf_migration_restore_consumefunction pf_restore_data_readyfunction xe_gt_sriov_pf_migration_restore_producefunction xe_gt_sriov_pf_migration_save_consumefunction destroy_pf_packetfunction action_ring_cleanupfunction pf_gt_migration_check_supportfunction xe_gt_sriov_pf_migration_init
Annotated Snippet
if (err) {
ret = ERR_PTR(err);
goto err;
}
err = drm_exec_lock_obj(&exec, &sysmem->ttm.base);
drm_exec_retry_on_contention(&exec);
if (err) {
ret = ERR_PTR(err);
goto err;
}
}
ret = xe_migrate_vram_copy_chunk(vram, vram_offset, sysmem, sysmem_offset, size,
save ? XE_MIGRATE_COPY_TO_SRAM : XE_MIGRATE_COPY_TO_VRAM);
err:
drm_exec_fini(&exec);
return ret;
}
#define PF_VRAM_SAVE_RESTORE_TIMEOUT (5 * HZ)
static int pf_save_vram_chunk(struct xe_gt *gt, unsigned int vfid,
struct xe_bo *src_vram, u64 src_vram_offset,
size_t size)
{
struct xe_sriov_packet *data;
struct dma_fence *fence;
int ret;
data = xe_sriov_packet_alloc(gt_to_xe(gt));
if (!data)
return -ENOMEM;
ret = xe_sriov_packet_init(data, gt->tile->id, gt->info.id,
XE_SRIOV_PACKET_TYPE_VRAM, src_vram_offset,
size);
if (ret)
goto fail;
fence = __pf_save_restore_vram(gt, vfid,
src_vram, src_vram_offset,
data->bo, 0, size, true);
if (IS_ERR(fence)) {
ret = PTR_ERR(fence);
goto fail;
}
ret = dma_fence_wait_timeout(fence, false, PF_VRAM_SAVE_RESTORE_TIMEOUT);
dma_fence_put(fence);
if (!ret) {
ret = -ETIME;
goto fail;
}
pf_dump_mig_data(gt, vfid, data, "VRAM data save");
ret = xe_gt_sriov_pf_migration_save_produce(gt, vfid, data);
if (ret)
goto fail;
return 0;
fail:
xe_sriov_packet_free(data);
return ret;
}
#define VF_VRAM_STATE_CHUNK_MAX_SIZE SZ_512M
static int pf_save_vf_vram_mig_data(struct xe_gt *gt, unsigned int vfid)
{
struct xe_gt_sriov_migration_data *migration = pf_pick_gt_migration(gt, vfid);
loff_t *offset = &migration->save.vram_offset;
struct xe_bo *vram;
size_t vram_size, chunk_size;
int ret;
vram = xe_gt_sriov_pf_config_get_lmem_obj(gt, vfid);
if (!vram)
return -ENXIO;
vram_size = xe_bo_size(vram);
xe_gt_assert(gt, *offset < vram_size);
chunk_size = min(vram_size - *offset, VF_VRAM_STATE_CHUNK_MAX_SIZE);
ret = pf_save_vram_chunk(gt, vfid, vram, *offset, chunk_size);
if (ret)
Annotation
- Immediate include surface: `drm/drm_managed.h`, `regs/xe_guc_regs.h`, `abi/guc_actions_sriov_abi.h`, `xe_bo.h`, `xe_ggtt.h`, `xe_gt.h`, `xe_gt_sriov_pf.h`, `xe_gt_sriov_pf_config.h`.
- Detected declarations: `function pf_dump_mig_data`, `function pf_migration_ggtt_size`, `function pf_save_vf_ggtt_mig_data`, `function pf_restore_vf_ggtt_mig_data`, `function xe_gt_sriov_pf_migration_ggtt_save`, `function xe_gt_sriov_pf_migration_ggtt_restore`, `function guc_action_vf_save_restore`, `function pf_send_guc_query_vf_mig_data_size`, `function pf_send_guc_save_vf_mig_data`, `function pf_send_guc_restore_vf_mig_data`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.