drivers/gpu/drm/xe/xe_gt_sriov_pf_migration_types.h

File Facts

System

Linux kernel

Corpus path

drivers/gpu/drm/xe/xe_gt_sriov_pf_migration_types.h

Extension

.h

Size

782 bytes

Lines

29

Domain

Driver Families

Bucket

drivers/gpu

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/ptr_ring.h

Detected Declarations

• struct xe_gt_sriov_migration_data

Annotated Snippet

struct xe_gt_sriov_migration_data {
	/** @ring: queue containing VF save / restore migration data */
	struct ptr_ring ring;
	/** @save: structure for currently processed save migration data */
	struct {
		/** @save.data_remaining: bitmap of migration types that need to be saved */
		unsigned long data_remaining;
		/** @save.vram_offset: last saved offset within VRAM, used for chunked VRAM save */
		loff_t vram_offset;
	} save;
};

#endif

Annotation

• Immediate include surface: `linux/ptr_ring.h`.
• Detected declarations: `struct xe_gt_sriov_migration_data`.
• Atlas domain: Driver Families / drivers/gpu.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.