drivers/gpu/drm/xe/xe_guc_capture.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/xe/xe_guc_capture.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/xe/xe_guc_capture.h- Extension
.h- Size
- 2170 bytes
- Lines
- 62
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.habi/guc_capture_abi.habi/guc_scheduler_abi.hxe_guc.h
Detected Declarations
struct xe_exec_queuestruct xe_gucstruct xe_hw_enginestruct xe_hw_engine_snapshotfunction xe_guc_class_to_capture_classfunction xe_engine_class_to_guc_capture_class
Annotated Snippet
#ifndef _XE_GUC_CAPTURE_H_
#define _XE_GUC_CAPTURE_H_
#include <linux/types.h>
#include "abi/guc_capture_abi.h"
#include "abi/guc_scheduler_abi.h"
#include "xe_guc.h"
struct xe_exec_queue;
struct xe_guc;
struct xe_hw_engine;
struct xe_hw_engine_snapshot;
static inline enum guc_capture_list_class_type xe_guc_class_to_capture_class(u16 class)
{
switch (class) {
case GUC_RENDER_CLASS:
case GUC_COMPUTE_CLASS:
return GUC_CAPTURE_LIST_CLASS_RENDER_COMPUTE;
case GUC_GSC_OTHER_CLASS:
return GUC_CAPTURE_LIST_CLASS_GSC_OTHER;
case GUC_VIDEO_CLASS:
case GUC_VIDEOENHANCE_CLASS:
case GUC_BLITTER_CLASS:
return class;
default:
XE_WARN_ON(class);
return GUC_CAPTURE_LIST_CLASS_MAX;
}
}
static inline enum guc_capture_list_class_type
xe_engine_class_to_guc_capture_class(enum xe_engine_class class)
{
return xe_guc_class_to_capture_class(xe_engine_class_to_guc_class(class));
}
void xe_guc_capture_process(struct xe_guc *guc);
int xe_guc_capture_getlist(struct xe_guc *guc, u32 owner, u32 type,
enum guc_capture_list_class_type capture_class, void **outptr);
int xe_guc_capture_getlistsize(struct xe_guc *guc, u32 owner, u32 type,
enum guc_capture_list_class_type capture_class, size_t *size);
int xe_guc_capture_getnullheader(struct xe_guc *guc, void **outptr, size_t *size);
size_t xe_guc_capture_ads_input_worst_size(struct xe_guc *guc);
const struct __guc_mmio_reg_descr_group *
xe_guc_capture_get_reg_desc_list(struct xe_gt *gt, u32 owner, u32 type,
enum guc_capture_list_class_type capture_class, bool is_ext);
struct __guc_capture_parsed_output *xe_guc_capture_get_matching_and_lock(struct xe_exec_queue *q);
void xe_engine_manual_capture(struct xe_hw_engine *hwe, struct xe_hw_engine_snapshot *snapshot);
void xe_engine_snapshot_print(struct xe_hw_engine_snapshot *snapshot, struct drm_printer *p);
void xe_engine_snapshot_capture_for_queue(struct xe_exec_queue *q);
void xe_guc_capture_steered_list_init(struct xe_guc *guc);
void xe_guc_capture_put_matched_nodes(struct xe_guc *guc);
int xe_guc_capture_init(struct xe_guc *guc);
#endif
Annotation
- Immediate include surface: `linux/types.h`, `abi/guc_capture_abi.h`, `abi/guc_scheduler_abi.h`, `xe_guc.h`.
- Detected declarations: `struct xe_exec_queue`, `struct xe_guc`, `struct xe_hw_engine`, `struct xe_hw_engine_snapshot`, `function xe_guc_class_to_capture_class`, `function xe_engine_class_to_guc_capture_class`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.