drivers/gpu/drm/xe/xe_guc_types.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/xe/xe_guc_types.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/xe/xe_guc_types.h- Extension
.h- Size
- 3603 bytes
- Lines
- 130
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/idr.hlinux/xarray.hregs/xe_reg_defs.hxe_guc_ads_types.hxe_guc_buf_types.hxe_guc_ct_types.hxe_guc_engine_activity_types.hxe_guc_fwif.hxe_guc_log_types.hxe_guc_pc_types.hxe_guc_relay_types.hxe_uc_fw_types.h
Detected Declarations
struct xe_guc_db_mgrstruct xe_guc_id_mgrstruct xe_guc
Annotated Snippet
struct xe_guc_db_mgr {
/** @count: number of doorbells to manage */
unsigned int count;
/** @bitmap: bitmap to track allocated doorbells */
unsigned long *bitmap;
};
/**
* struct xe_guc_id_mgr - GuC context ID Manager.
*
* Note: GuC context ID Manager is relying on &xe_guc::submission_state.lock
* to protect its members.
*/
struct xe_guc_id_mgr {
/** @bitmap: bitmap to track allocated IDs */
unsigned long *bitmap;
/** @total: total number of IDs being managed */
unsigned int total;
/** @used: number of IDs currently in use */
unsigned int used;
};
/**
* struct xe_guc - Graphic micro controller
*/
struct xe_guc {
/** @fw: Generic uC firmware management */
struct xe_uc_fw fw;
/** @log: GuC log */
struct xe_guc_log log;
/** @ads: GuC ads */
struct xe_guc_ads ads;
/** @ct: GuC ct */
struct xe_guc_ct ct;
/** @buf: GuC Buffer Cache manager */
struct xe_guc_buf_cache buf;
/** @capture: the error-state-capture module's data and objects */
struct xe_guc_state_capture *capture;
/** @pc: GuC Power Conservation */
struct xe_guc_pc pc;
/** @dbm: GuC Doorbell Manager */
struct xe_guc_db_mgr dbm;
/** @g2g: GuC to GuC communication state */
struct {
/** @g2g.bo: Storage for GuC to GuC communication channels */
struct xe_bo *bo;
/** @g2g.owned: Is the BO owned by this GT or just mapped in */
bool owned;
} g2g;
/** @submission_state: GuC submission state */
struct {
/** @submission_state.idm: GuC context ID Manager */
struct xe_guc_id_mgr idm;
/** @submission_state.exec_queue_lookup: Lookup an xe_engine from guc_id */
struct xarray exec_queue_lookup;
/** @submission_state.stopped: submissions are stopped */
atomic_t stopped;
/**
* @submission_state.reset_blocked: reset attempts are blocked;
* blocking reset in order to delay it may be required if running
* an operation which is sensitive to resets.
*/
atomic_t reset_blocked;
/** @submission_state.lock: protects submission state */
struct mutex lock;
/** @submission_state.enabled: submission is enabled */
bool enabled;
/**
* @submission_state.initialized: mark when submission state is
* even initialized - before that not even the lock is valid
*/
bool initialized;
/** @submission_state.fini_wq: submit fini wait queue */
wait_queue_head_t fini_wq;
} submission_state;
/** @hwconfig: Hardware config state */
struct {
/** @hwconfig.bo: buffer object of the hardware config */
struct xe_bo *bo;
/** @hwconfig.size: size of the hardware config */
u32 size;
} hwconfig;
/** @relay: GuC Relay Communication used in SR-IOV */
struct xe_guc_relay relay;
/** @engine_activity: Device specific engine activity */
Annotation
- Immediate include surface: `linux/idr.h`, `linux/xarray.h`, `regs/xe_reg_defs.h`, `xe_guc_ads_types.h`, `xe_guc_buf_types.h`, `xe_guc_ct_types.h`, `xe_guc_engine_activity_types.h`, `xe_guc_fwif.h`.
- Detected declarations: `struct xe_guc_db_mgr`, `struct xe_guc_id_mgr`, `struct xe_guc`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.