drivers/gpu/drm/xe/xe_huc.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/xe/xe_huc.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/xe/xe_huc.c- Extension
.c- Size
- 7967 bytes
- Lines
- 315
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
xe_huc.hlinux/delay.hdrm/drm_managed.habi/gsc_pxp_commands_abi.hregs/xe_gsc_regs.hregs/xe_guc_regs.hxe_bo.hxe_device.hxe_force_wake.hxe_gsc_submit.hxe_gt.hxe_gt_printk.hxe_guc.hxe_map.hxe_mmio.hxe_sriov.hxe_uc_fw.h
Detected Declarations
function huc_to_gtfunction huc_to_xefunction huc_to_gucfunction huc_alloc_gsc_pktfunction xe_huc_initfunction xe_huc_init_post_hwconfigfunction xe_huc_uploadfunction huc_emit_pxp_auth_msgfunction huc_auth_via_gsccsfunction xe_huc_is_authenticatedfunction xe_huc_authfunction xe_huc_sanitizefunction xe_huc_print_info
Annotated Snippet
// SPDX-License-Identifier: MIT
/*
* Copyright © 2022 Intel Corporation
*/
#include "xe_huc.h"
#include <linux/delay.h>
#include <drm/drm_managed.h>
#include "abi/gsc_pxp_commands_abi.h"
#include "regs/xe_gsc_regs.h"
#include "regs/xe_guc_regs.h"
#include "xe_bo.h"
#include "xe_device.h"
#include "xe_force_wake.h"
#include "xe_gsc_submit.h"
#include "xe_gt.h"
#include "xe_gt_printk.h"
#include "xe_guc.h"
#include "xe_map.h"
#include "xe_mmio.h"
#include "xe_sriov.h"
#include "xe_uc_fw.h"
static struct xe_gt *
huc_to_gt(struct xe_huc *huc)
{
return container_of(huc, struct xe_gt, uc.huc);
}
static struct xe_device *
huc_to_xe(struct xe_huc *huc)
{
return gt_to_xe(huc_to_gt(huc));
}
static struct xe_guc *
huc_to_guc(struct xe_huc *huc)
{
return &container_of(huc, struct xe_uc, huc)->guc;
}
#define PXP43_HUC_AUTH_INOUT_SIZE SZ_4K
static int huc_alloc_gsc_pkt(struct xe_huc *huc)
{
struct xe_gt *gt = huc_to_gt(huc);
struct xe_device *xe = gt_to_xe(gt);
struct xe_bo *bo;
/* we use a single object for both input and output */
bo = xe_managed_bo_create_pin_map(xe, gt_to_tile(gt),
PXP43_HUC_AUTH_INOUT_SIZE * 2,
XE_BO_FLAG_SYSTEM |
XE_BO_FLAG_GGTT);
if (IS_ERR(bo))
return PTR_ERR(bo);
huc->gsc_pkt = bo;
return 0;
}
int xe_huc_init(struct xe_huc *huc)
{
struct xe_gt *gt = huc_to_gt(huc);
struct xe_device *xe = gt_to_xe(gt);
int ret;
huc->fw.type = XE_UC_FW_TYPE_HUC;
/*
* The HuC is only available on the media GT on most platforms. The
* exception to that rule are the old Xe1 platforms where there was
* no separate GT for media IP, so the HuC was part of the primary
* GT. Such platforms have graphics versions 12.55 and earlier.
*/
if (!xe_gt_is_media_type(gt) && GRAPHICS_VERx100(xe) > 1255) {
xe_uc_fw_change_status(&huc->fw, XE_UC_FIRMWARE_NOT_SUPPORTED);
return 0;
}
ret = xe_uc_fw_init(&huc->fw);
if (ret)
goto out;
if (!xe_uc_fw_is_enabled(&huc->fw))
return 0;
Annotation
- Immediate include surface: `xe_huc.h`, `linux/delay.h`, `drm/drm_managed.h`, `abi/gsc_pxp_commands_abi.h`, `regs/xe_gsc_regs.h`, `regs/xe_guc_regs.h`, `xe_bo.h`, `xe_device.h`.
- Detected declarations: `function huc_to_gt`, `function huc_to_xe`, `function huc_to_guc`, `function huc_alloc_gsc_pkt`, `function xe_huc_init`, `function xe_huc_init_post_hwconfig`, `function xe_huc_upload`, `function huc_emit_pxp_auth_msg`, `function huc_auth_via_gsccs`, `function xe_huc_is_authenticated`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.