drivers/gpu/drm/xe/xe_i2c.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/xe/xe_i2c.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/xe/xe_i2c.c- Extension
.c- Size
- 9465 bytes
- Lines
- 385
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
drm/drm_print.hlinux/array_size.hlinux/container_of.hlinux/device.hlinux/err.hlinux/i2c.hlinux/ioport.hlinux/irq.hlinux/irqdomain.hlinux/notifier.hlinux/pci.hlinux/platform_device.hlinux/property.hlinux/regmap.hlinux/sprintf.hlinux/string.hlinux/types.hlinux/workqueue.hregs/xe_i2c_regs.hregs/xe_irq_regs.hxe_device.hxe_i2c.hxe_mmio.hxe_sriov.hxe_survivability_mode.h
Detected Declarations
function xe_i2c_read_endpointfunction xe_i2c_client_workfunction xe_i2c_notifierfunction xe_i2c_register_adapterfunction xe_i2c_unregister_adapterfunction xe_i2c_presentfunction xe_i2c_irq_presentfunction xe_i2c_irq_handlerfunction xe_i2c_irq_resetfunction xe_i2c_irq_postinstallfunction xe_i2c_irq_mapfunction xe_i2c_create_irqfunction xe_i2c_remove_irqfunction xe_i2c_readfunction xe_i2c_writefunction xe_i2c_pm_suspendfunction xe_i2c_pm_resumefunction xe_i2c_removefunction xe_i2c_probe
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0 OR MIT
/*
* Intel Xe I2C attached Microcontroller Units (MCU)
*
* Copyright (C) 2025 Intel Corporation.
*/
#include <drm/drm_print.h>
#include <linux/array_size.h>
#include <linux/container_of.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/ioport.h>
#include <linux/irq.h>
#include <linux/irqdomain.h>
#include <linux/notifier.h>
#include <linux/pci.h>
#include <linux/platform_device.h>
#include <linux/property.h>
#include <linux/regmap.h>
#include <linux/sprintf.h>
#include <linux/string.h>
#include <linux/types.h>
#include <linux/workqueue.h>
#include "regs/xe_i2c_regs.h"
#include "regs/xe_irq_regs.h"
#include "xe_device.h"
#include "xe_i2c.h"
#include "xe_mmio.h"
#include "xe_sriov.h"
#include "xe_survivability_mode.h"
/**
* DOC: Xe I2C devices
*
* Register a platform device for the I2C host controller (Synpsys DesignWare
* I2C) if the registers of that controller are mapped to the MMIO, and also the
* I2C client device for the Add-In Management Controller (the MCU) attached to
* the host controller.
*
* See drivers/i2c/busses/i2c-designware-* for more information on the I2C host
* controller.
*/
static const char adapter_name[] = "i2c_designware";
static const struct property_entry xe_i2c_adapter_properties[] = {
PROPERTY_ENTRY_STRING("compatible", "intel,xe-i2c"),
PROPERTY_ENTRY_U32("clock-frequency", I2C_MAX_FAST_MODE_PLUS_FREQ),
{ }
};
static inline void xe_i2c_read_endpoint(struct xe_mmio *mmio, void *ep)
{
u32 *val = ep;
val[0] = xe_mmio_read32(mmio, REG_SG_REMAP_ADDR_PREFIX);
val[1] = xe_mmio_read32(mmio, REG_SG_REMAP_ADDR_POSTFIX);
}
static void xe_i2c_client_work(struct work_struct *work)
{
struct xe_i2c *i2c = container_of(work, struct xe_i2c, work);
struct i2c_board_info info = {
.type = "amc",
.flags = I2C_CLIENT_HOST_NOTIFY,
.addr = i2c->ep.addr[1],
};
i2c->client[0] = i2c_new_client_device(i2c->adapter, &info);
}
static int xe_i2c_notifier(struct notifier_block *nb, unsigned long action, void *data)
{
struct xe_i2c *i2c = container_of(nb, struct xe_i2c, bus_notifier);
struct i2c_adapter *adapter = i2c_verify_adapter(data);
struct device *dev = data;
if (action == BUS_NOTIFY_ADD_DEVICE &&
adapter && dev->parent == &i2c->pdev->dev) {
i2c->adapter = adapter;
schedule_work(&i2c->work);
return NOTIFY_OK;
}
return NOTIFY_DONE;
}
Annotation
- Immediate include surface: `drm/drm_print.h`, `linux/array_size.h`, `linux/container_of.h`, `linux/device.h`, `linux/err.h`, `linux/i2c.h`, `linux/ioport.h`, `linux/irq.h`.
- Detected declarations: `function xe_i2c_read_endpoint`, `function xe_i2c_client_work`, `function xe_i2c_notifier`, `function xe_i2c_register_adapter`, `function xe_i2c_unregister_adapter`, `function xe_i2c_present`, `function xe_i2c_irq_present`, `function xe_i2c_irq_handler`, `function xe_i2c_irq_reset`, `function xe_i2c_irq_postinstall`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.