drivers/gpu/drm/xe/xe_lrc.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/xe/xe_lrc.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/xe/xe_lrc.h- Extension
.h- Size
- 5498 bytes
- Lines
- 184
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hxe_lrc_types.h
Detected Declarations
struct drm_printerstruct xe_bbstruct xe_devicestruct xe_exec_queuestruct xe_gtstruct xe_hw_enginestruct xe_lrcstruct xe_vmstruct xe_lrc_snapshotenum xe_multi_queue_priorityenum xe_engine_classfunction xe_lrc_putfunction xe_lrc_ring_sizefunction xe_lrc_is_multi_queue
Annotated Snippet
struct xe_lrc_snapshot {
struct xe_bo *lrc_bo;
void *lrc_snapshot;
unsigned long lrc_size, lrc_offset;
unsigned long replay_size, replay_offset;
u32 context_desc;
u32 ring_addr;
u32 indirect_context_desc;
u32 head;
u32 start;
struct {
u32 internal;
u32 memory;
} tail;
u32 start_seqno;
u32 seqno;
u64 ctx_timestamp;
u64 ctx_timestamp_ms;
u64 queue_timestamp;
u64 queue_timestamp_ms;
u32 ctx_job_timestamp;
};
#define LRC_PPHWSP_FLUSH_INVAL_SCRATCH_ADDR (0x34 * 4)
#define LRC_PPHWSP_PXP_INVAL_SCRATCH_ADDR (0x40 * 4)
#define LRC_WA_BB_SIZE SZ_4K
#define XE_LRC_CREATE_RUNALONE BIT(0)
#define XE_LRC_CREATE_PXP BIT(1)
#define XE_LRC_CREATE_USER_CTX BIT(2)
#define XE_LRC_DISABLE_STATE_CACHE_PERF_FIX BIT(3)
struct xe_lrc *xe_lrc_create(struct xe_hw_engine *hwe, struct xe_vm *vm,
void *replay_state, u32 ring_size, u16 msix_vec, u32 flags);
void xe_lrc_destroy(struct kref *ref);
/**
* xe_lrc_get - Get reference to the LRC
* @lrc: Logical Ring Context
*
* Increment reference count of @lrc
*/
static inline struct xe_lrc *xe_lrc_get(struct xe_lrc *lrc)
{
kref_get(&lrc->refcount);
return lrc;
}
/**
* xe_lrc_put - Put reference of the LRC
* @lrc: Logical Ring Context
*
* Decrement reference count of @lrc, call xe_lrc_destroy when
* reference count reaches 0.
*/
static inline void xe_lrc_put(struct xe_lrc *lrc)
{
if (lrc)
kref_put(&lrc->refcount, xe_lrc_destroy);
}
/**
* xe_lrc_ring_size() - Xe LRC ring size
*
* Return: Size of LRC ring buffer
*/
static inline size_t xe_lrc_ring_size(void)
{
return SZ_16K;
}
static inline bool xe_lrc_is_multi_queue(struct xe_lrc *lrc)
{
return lrc->multi_queue.primary_lrc;
}
size_t xe_gt_lrc_hang_replay_size(struct xe_gt *gt, enum xe_engine_class class);
size_t xe_gt_lrc_size(struct xe_gt *gt, enum xe_engine_class class);
u32 xe_lrc_pphwsp_offset(struct xe_lrc *lrc);
u32 xe_lrc_regs_offset(struct xe_lrc *lrc);
void xe_lrc_set_ring_tail(struct xe_lrc *lrc, u32 tail);
u32 xe_lrc_ring_tail(struct xe_lrc *lrc);
void xe_lrc_set_ring_head(struct xe_lrc *lrc, u32 head);
u32 xe_lrc_ring_head(struct xe_lrc *lrc);
u32 xe_lrc_ring_space(struct xe_lrc *lrc);
void xe_lrc_write_ring(struct xe_lrc *lrc, const void *data, size_t size);
Annotation
- Immediate include surface: `linux/types.h`, `xe_lrc_types.h`.
- Detected declarations: `struct drm_printer`, `struct xe_bb`, `struct xe_device`, `struct xe_exec_queue`, `struct xe_gt`, `struct xe_hw_engine`, `struct xe_lrc`, `struct xe_vm`, `struct xe_lrc_snapshot`, `enum xe_multi_queue_priority`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.