drivers/gpu/drm/xe/xe_lrc_types.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/xe/xe_lrc_types.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/xe/xe_lrc_types.h- Extension
.h- Size
- 1840 bytes
- Lines
- 82
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kref.hxe_hw_fence_types.h
Detected Declarations
struct xe_bostruct xe_lrcstruct xe_lrc_snapshot
Annotated Snippet
struct xe_lrc {
/**
* @bo: buffer object (memory) for logical ring context, per process HW
* status page, and submission ring.
*/
struct xe_bo *bo;
/**
* @seqno_bo: Buffer object (memory) for seqno numbers. Always in system
* memory as this a CPU read, GPU write path object.
*/
struct xe_bo *seqno_bo;
/** @size: size of the lrc and optional indirect ring state */
u32 size;
/** @replay_size: Size LRC needed for replaying a hang */
u32 replay_size;
/** @gt: gt which this LRC belongs to */
struct xe_gt *gt;
/** @flags: LRC flags */
#define XE_LRC_FLAG_INDIRECT_CTX 0x1
#define XE_LRC_FLAG_INDIRECT_RING_STATE 0x2
u32 flags;
/** @refcount: ref count of this lrc */
struct kref refcount;
/** @ring: submission ring state */
struct {
/** @ring.size: size of submission ring */
u32 size;
/** @ring.tail: tail of submission ring */
u32 tail;
/** @ring.old_tail: shadow of tail */
u32 old_tail;
} ring;
/** @desc: LRC descriptor */
u64 desc;
/** @fence_ctx: context for hw fence */
struct xe_hw_fence_ctx fence_ctx;
/** @ctx_timestamp: readout value of CTX_TIMESTAMP on last update */
u64 ctx_timestamp;
/** @queue_timestamp: value of QUEUE_TIMESTAMP on last update */
u64 queue_timestamp;
/** @multi_queue: Multi queue LRC related information */
struct {
/** @multi_queue.primary_lrc: Primary lrc of this multi-queue group*/
struct xe_lrc *primary_lrc;
/** @multi_queue.pos: Position of LRC within the multi-queue group */
u8 pos;
} multi_queue;
};
struct xe_lrc_snapshot;
#endif
Annotation
- Immediate include surface: `linux/kref.h`, `xe_hw_fence_types.h`.
- Detected declarations: `struct xe_bo`, `struct xe_lrc`, `struct xe_lrc_snapshot`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.