drivers/gpu/drm/xe/xe_pt.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/xe/xe_pt.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/xe/xe_pt.c- Extension
.c- Size
- 79257 bytes
- Lines
- 2776
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
xe_pt.hregs/xe_gtt_defs.hxe_bo.hxe_device.hxe_drm_client.hxe_exec_queue.hxe_gt.hxe_gt_stats.hxe_migrate.hxe_page_reclaim.hxe_pat.hxe_pt_types.hxe_pt_walk.hxe_res_cursor.hxe_sched_job.hxe_svm.hxe_sync.hxe_tlb_inval_job.hxe_trace.hxe_ttm_stolen_mgr.hxe_userptr.hxe_vm.h
Detected Declarations
struct xe_pt_dirstruct xe_pt_updatestruct xe_pt_stage_bind_walkstruct xe_walk_updatestruct xe_pt_zap_ptes_walkstruct xe_pt_stage_unbind_walkfunction xe_pt_entry_stagingfunction __xe_pt_empty_ptefunction xe_pt_freefunction xe_pt_createfunction xe_pt_populate_emptyfunction xe_pt_shiftfunction xe_pt_destroyfunction xe_pt_clearfunction xe_pt_new_sharedfunction annotatefunction xe_pt_hugepte_possiblefunction xe_pt_scan_64Kfunction xe_pt_is_pte_ps64Kfunction xe_pt_stage_bind_entryfunction xe_atomic_for_vramfunction xe_atomic_for_systemfunction xe_pt_stage_bindfunction xe_pt_nonshared_offsetsfunction xe_pt_zap_ptes_entryfunction xe_pt_zap_ptesfunction xe_pt_zap_ptes_rangefunction xe_vm_populate_pgtablefunction xe_pt_cancel_bindfunction xe_pt_commit_prepare_locks_assertfunction xe_pt_commit_locks_assertfunction xe_pt_commitfunction xe_pt_abort_bindfunction xe_pt_commit_prepare_bindfunction xe_pt_free_bindfunction xe_pt_prepare_bindfunction xe_vm_dbg_print_entriesfunction no_in_syncsfunction job_test_add_depsfunction vma_add_depsfunction op_add_depsfunction xe_pt_vm_dependenciesfunction list_for_each_entryfunction xe_pt_pre_commitfunction xe_pt_userptr_inject_eagainfunction xe_pt_userptr_inject_eagainfunction vma_check_userptrfunction op_check_svm_userptr
Annotated Snippet
struct xe_pt_dir {
struct xe_pt pt;
/** @children: Array of page-table child nodes */
struct xe_ptw *children[XE_PDES];
/** @staging: Array of page-table staging nodes */
struct xe_ptw *staging[XE_PDES];
};
#if IS_ENABLED(CONFIG_DRM_XE_DEBUG_VM)
#define xe_pt_set_addr(__xe_pt, __addr) ((__xe_pt)->addr = (__addr))
#define xe_pt_addr(__xe_pt) ((__xe_pt)->addr)
#else
#define xe_pt_set_addr(__xe_pt, __addr)
#define xe_pt_addr(__xe_pt) 0ull
#endif
static const u64 xe_normal_pt_shifts[] = {12, 21, 30, 39, 48};
static const u64 xe_compact_pt_shifts[] = {16, 21, 30, 39, 48};
#define XE_PT_HIGHEST_LEVEL (ARRAY_SIZE(xe_normal_pt_shifts) - 1)
static struct xe_pt_dir *as_xe_pt_dir(struct xe_pt *pt)
{
return container_of(pt, struct xe_pt_dir, pt);
}
static struct xe_pt *
xe_pt_entry_staging(struct xe_pt_dir *pt_dir, unsigned int index)
{
return container_of(pt_dir->staging[index], struct xe_pt, base);
}
static u64 __xe_pt_empty_pte(struct xe_tile *tile, struct xe_vm *vm,
unsigned int level)
{
struct xe_device *xe = tile_to_xe(tile);
u16 pat_index = xe_cache_pat_idx(xe, XE_CACHE_WB);
u8 id = tile->id;
if (!xe_vm_has_scratch(vm))
return 0;
if (level > MAX_HUGEPTE_LEVEL)
return vm->pt_ops->pde_encode_bo(vm->scratch_pt[id][level - 1]->bo,
0);
return vm->pt_ops->pte_encode_addr(xe, 0, pat_index, level, IS_DGFX(xe), 0) |
XE_PTE_NULL;
}
static void xe_pt_free(struct xe_pt *pt)
{
if (pt->level)
kfree(as_xe_pt_dir(pt));
else
kfree(pt);
}
/**
* xe_pt_create() - Create a page-table.
* @vm: The vm to create for.
* @tile: The tile to create for.
* @level: The page-table level.
* @exec: The drm_exec object used to lock the vm.
*
* Allocate and initialize a single struct xe_pt metadata structure. Also
* create the corresponding page-table bo, but don't initialize it. If the
* level is grater than zero, then it's assumed to be a directory page-
* table and the directory structure is also allocated and initialized to
* NULL pointers.
*
* Return: A valid struct xe_pt pointer on success, Pointer error code on
* error.
*/
struct xe_pt *xe_pt_create(struct xe_vm *vm, struct xe_tile *tile,
unsigned int level, struct drm_exec *exec)
{
struct xe_pt *pt;
struct xe_bo *bo;
u32 bo_flags;
int err;
if (level) {
struct xe_pt_dir *dir = kzalloc_obj(*dir);
pt = (dir) ? &dir->pt : NULL;
} else {
pt = kzalloc_obj(*pt);
}
if (!pt)
Annotation
- Immediate include surface: `xe_pt.h`, `regs/xe_gtt_defs.h`, `xe_bo.h`, `xe_device.h`, `xe_drm_client.h`, `xe_exec_queue.h`, `xe_gt.h`, `xe_gt_stats.h`.
- Detected declarations: `struct xe_pt_dir`, `struct xe_pt_update`, `struct xe_pt_stage_bind_walk`, `struct xe_walk_update`, `struct xe_pt_zap_ptes_walk`, `struct xe_pt_stage_unbind_walk`, `function xe_pt_entry_staging`, `function __xe_pt_empty_pte`, `function xe_pt_free`, `function xe_pt_create`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.