drivers/gpu/drm/xe/xe_rtp_types.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/xe/xe_rtp_types.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/xe/xe_rtp_types.h- Extension
.h- Size
- 2983 bytes
- Lines
- 133
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hregs/xe_reg_defs.h
Detected Declarations
struct xe_devicestruct xe_hw_enginestruct xe_gtstruct xe_rtp_actionstruct xe_rtp_rulestruct xe_rtp_entry_srstruct xe_rtp_entrystruct xe_rtp_process_ctxenum xe_rtp_process_type
Annotated Snippet
struct xe_rtp_action {
/** @reg: Register */
struct xe_reg reg;
/**
* @clr_bits: bits to clear when updating register. It's always a
* superset of bits being modified
*/
u32 clr_bits;
/** @set_bits: bits to set when updating register */
u32 set_bits;
#define XE_RTP_NOCHECK .read_mask = 0
/** @read_mask: mask for bits to consider when reading value back */
u32 read_mask;
#define XE_RTP_ACTION_FLAG_ENGINE_BASE BIT(0)
/** @flags: flags to apply on rule evaluation or action */
u8 flags;
};
enum {
XE_RTP_MATCH_PLATFORM,
XE_RTP_MATCH_SUBPLATFORM,
XE_RTP_MATCH_PLATFORM_STEP,
XE_RTP_MATCH_GRAPHICS_VERSION,
XE_RTP_MATCH_GRAPHICS_VERSION_RANGE,
XE_RTP_MATCH_GRAPHICS_VERSION_ANY_GT,
XE_RTP_MATCH_GRAPHICS_STEP,
XE_RTP_MATCH_MEDIA_VERSION,
XE_RTP_MATCH_MEDIA_VERSION_RANGE,
XE_RTP_MATCH_MEDIA_VERSION_ANY_GT,
XE_RTP_MATCH_MEDIA_STEP,
XE_RTP_MATCH_INTEGRATED,
XE_RTP_MATCH_DISCRETE,
XE_RTP_MATCH_ENGINE_CLASS,
XE_RTP_MATCH_NOT_ENGINE_CLASS,
XE_RTP_MATCH_FUNC,
XE_RTP_MATCH_OR,
};
/** struct xe_rtp_rule - match rule for processing entry */
struct xe_rtp_rule {
u8 match_type;
/* match filters */
union {
/* MATCH_PLATFORM / MATCH_SUBPLATFORM */
struct {
u8 platform;
u8 subplatform;
};
/*
* MATCH_GRAPHICS_VERSION / XE_RTP_MATCH_GRAPHICS_VERSION_RANGE /
* MATCH_MEDIA_VERSION / XE_RTP_MATCH_MEDIA_VERSION_RANGE
*/
struct {
u32 ver_start;
#define XE_RTP_END_VERSION_UNDEFINED U32_MAX
u32 ver_end;
};
/* MATCH_STEP */
struct {
u8 step_start;
u8 step_end;
};
/* MATCH_ENGINE_CLASS / MATCH_NOT_ENGINE_CLASS */
struct {
u8 engine_class;
};
/* MATCH_FUNC */
bool (*match_func)(const struct xe_device *xe,
const struct xe_gt *gt,
const struct xe_hw_engine *hwe);
};
};
/** struct xe_rtp_entry_sr - Entry in an rtp table */
struct xe_rtp_entry_sr {
const char *name;
const struct xe_rtp_action *actions;
const struct xe_rtp_rule *rules;
u8 n_rules;
u8 n_actions;
#define XE_RTP_ENTRY_FLAG_FOREACH_ENGINE BIT(0)
u8 flags;
};
/** struct xe_rtp_entry - Entry in an rtp table, with no action associated */
struct xe_rtp_entry {
const char *name;
const struct xe_rtp_rule *rules;
u8 n_rules;
Annotation
- Immediate include surface: `linux/types.h`, `regs/xe_reg_defs.h`.
- Detected declarations: `struct xe_device`, `struct xe_hw_engine`, `struct xe_gt`, `struct xe_rtp_action`, `struct xe_rtp_rule`, `struct xe_rtp_entry_sr`, `struct xe_rtp_entry`, `struct xe_rtp_process_ctx`, `enum xe_rtp_process_type`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.