drivers/gpu/drm/xe/xe_sched_job_types.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/xe/xe_sched_job_types.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/xe/xe_sched_job_types.h- Extension
.h- Size
- 2235 bytes
- Lines
- 84
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kref.hdrm/gpu_scheduler.h
Detected Declarations
struct xe_exec_queuestruct dma_fencestruct dma_fence_chainstruct xe_job_ptrsstruct xe_sched_jobstruct xe_sched_job_snapshot
Annotated Snippet
struct xe_job_ptrs {
/** @lrc_fence: Pre-allocated uninitialized lrc fence.*/
struct dma_fence *lrc_fence;
/** @chain_fence: Pre-allocated uninitialized fence chain node. */
struct dma_fence_chain *chain_fence;
/** @batch_addr: Batch buffer address. */
u64 batch_addr;
/**
* @head: The tail pointer of the LRC (so head pointer of job) when the
* job was submitted
*/
u32 head;
};
/**
* struct xe_sched_job - Xe schedule job (batch buffer tracking)
*/
struct xe_sched_job {
/** @drm: base DRM scheduler job */
struct drm_sched_job drm;
/** @q: Exec queue */
struct xe_exec_queue *q;
/** @refcount: ref count of this job */
struct kref refcount;
/**
* @fence: dma fence to indicate completion. 1 way relationship - job
* can safely reference fence, fence cannot safely reference job.
*/
struct dma_fence *fence;
/** @user_fence: write back value when BB is complete */
struct {
/** @user_fence.used: user fence is used */
bool used;
/** @user_fence.addr: address to write to */
u64 addr;
/** @user_fence.value: write back value */
u64 value;
} user_fence;
/** @lrc_seqno: LRC seqno */
u32 lrc_seqno;
/** @migrate_flush_flags: Additional flush flags for migration jobs */
u32 migrate_flush_flags;
/** @sample_timestamp: Sampling of job timestamp in TDR */
u64 sample_timestamp;
/** @ring_ops_flush_tlb: The ring ops need to flush TLB before payload. */
bool ring_ops_flush_tlb;
/** @ring_ops_force_reset: The ring ops need to trigger a reset before payload. */
bool ring_ops_force_reset;
/** @ggtt: mapped in ggtt. */
bool ggtt;
/** @restore_replay: job being replayed for restore */
bool restore_replay;
/** @last_replay: last job being replayed */
bool last_replay;
/** @ptrs: per instance pointers. */
struct xe_job_ptrs ptrs[];
};
struct xe_sched_job_snapshot {
u16 batch_addr_len;
u64 batch_addr[] __counted_by(batch_addr_len);
};
#endif
Annotation
- Immediate include surface: `linux/kref.h`, `drm/gpu_scheduler.h`.
- Detected declarations: `struct xe_exec_queue`, `struct dma_fence`, `struct dma_fence_chain`, `struct xe_job_ptrs`, `struct xe_sched_job`, `struct xe_sched_job_snapshot`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.