drivers/gpu/drm/xe/xe_tile_sriov_vf.h

File Facts

System

Linux kernel

Corpus path

drivers/gpu/drm/xe/xe_tile_sriov_vf.h

Extension

.h

Size

562 bytes

Lines

21

Domain

Driver Families

Bucket

drivers/gpu

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/types.h

Detected Declarations

• struct xe_tile

Annotated Snippet

#ifndef _XE_TILE_SRIOV_VF_H_
#define _XE_TILE_SRIOV_VF_H_

#include <linux/types.h>

struct xe_tile;

u64 xe_tile_sriov_vf_ggtt(struct xe_tile *tile);
void xe_tile_sriov_vf_ggtt_store(struct xe_tile *tile, u64 ggtt_size);
u64 xe_tile_sriov_vf_ggtt_base(struct xe_tile *tile);
void xe_tile_sriov_vf_ggtt_base_store(struct xe_tile *tile, u64 ggtt_size);
u64 xe_tile_sriov_vf_lmem(struct xe_tile *tile);
void xe_tile_sriov_vf_lmem_store(struct xe_tile *tile, u64 lmem_size);

#endif

Annotation

• Immediate include surface: `linux/types.h`.
• Detected declarations: `struct xe_tile`.
• Atlas domain: Driver Families / drivers/gpu.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.