drivers/gpu/drm/xe/xe_tlb_inval_types.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/xe/xe_tlb_inval_types.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/xe/xe_tlb_inval_types.h- Extension
.h- Size
- 4242 bytes
- Lines
- 150
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/workqueue.hlinux/dma-fence.hxe_device_types.h
Detected Declarations
struct drm_suballocstruct xe_tlb_invalstruct xe_tlb_inval_opsstruct xe_tlb_invalstruct xe_tlb_inval_fencestruct xe_tlb_inval_batch
Annotated Snippet
struct xe_tlb_inval_ops {
/**
* @all: Invalidate all TLBs
* @tlb_inval: TLB invalidation client
* @seqno: Seqno of TLB invalidation
*
* Return 0 on success, -ECANCELED if backend is mid-reset, error on
* failure
*/
int (*all)(struct xe_tlb_inval *tlb_inval, u32 seqno);
/**
* @ggtt: Invalidate global translation TLBs
* @tlb_inval: TLB invalidation client
* @seqno: Seqno of TLB invalidation
*
* Return 0 on success, -ECANCELED if backend is mid-reset, error on
* failure
*/
int (*ggtt)(struct xe_tlb_inval *tlb_inval, u32 seqno);
/**
* @ppgtt: Invalidate per-process translation TLBs
* @tlb_inval: TLB invalidation client
* @seqno: Seqno of TLB invalidation
* @start: Start address
* @end: End address
* @asid: Address space ID
* @prl_sa: Suballocation for page reclaim list
*
* Return 0 on success, -ECANCELED if backend is mid-reset, error on
* failure
*/
int (*ppgtt)(struct xe_tlb_inval *tlb_inval, u32 seqno, u64 start,
u64 end, u32 asid, struct drm_suballoc *prl_sa);
/**
* @initialized: Backend is initialized
* @tlb_inval: TLB invalidation client
*
* Return: True if back is initialized, False otherwise
*/
bool (*initialized)(struct xe_tlb_inval *tlb_inval);
/**
* @flush: Flush pending TLB invalidations
* @tlb_inval: TLB invalidation client
*/
void (*flush)(struct xe_tlb_inval *tlb_inval);
/**
* @timeout_delay: Timeout delay for TLB invalidation
* @tlb_inval: TLB invalidation client
*
* Return: Timeout delay for TLB invalidation in jiffies
*/
long (*timeout_delay)(struct xe_tlb_inval *tlb_inval);
};
/** struct xe_tlb_inval - TLB invalidation client (frontend) */
struct xe_tlb_inval {
/** @private: Backend private pointer */
void *private;
/** @xe: Pointer to Xe device */
struct xe_device *xe;
/** @ops: TLB invalidation ops */
const struct xe_tlb_inval_ops *ops;
/** @tlb_inval.seqno: TLB invalidation seqno, protected by CT lock */
#define TLB_INVALIDATION_SEQNO_MAX 0x100000
#define TLB_INVALIDATION_SEQNO_INVALID TLB_INVALIDATION_SEQNO_MAX
int seqno;
/** @tlb_invalidation.seqno_lock: protects @tlb_invalidation.seqno */
struct mutex seqno_lock;
/**
* @seqno_recv: last received TLB invalidation seqno, protected by
* CT lock
*/
int seqno_recv;
/**
* @pending_fences: list of pending fences waiting TLB invaliations,
* protected CT lock
*/
struct list_head pending_fences;
/**
* @pending_lock: protects @pending_fences and updating @seqno_recv.
*/
spinlock_t pending_lock;
/**
* @fence_tdr: schedules a delayed call to xe_tlb_fence_timeout after
* the timeout interval is over.
Annotation
- Immediate include surface: `linux/workqueue.h`, `linux/dma-fence.h`, `xe_device_types.h`.
- Detected declarations: `struct drm_suballoc`, `struct xe_tlb_inval`, `struct xe_tlb_inval_ops`, `struct xe_tlb_inval`, `struct xe_tlb_inval_fence`, `struct xe_tlb_inval_batch`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.