drivers/gpu/drm/xe/xe_uc.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/xe/xe_uc.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/xe/xe_uc.c- Extension
.c- Size
- 6183 bytes
- Lines
- 338
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
xe_uc.hxe_assert.hxe_device.hxe_gsc.hxe_gt.hxe_gt_printk.hxe_gt_sriov_vf.hxe_guc.hxe_guc_pc.hxe_guc_rc.hxe_guc_engine_activity.hxe_huc.hxe_sriov.hxe_wopcm.h
Detected Declarations
function uc_to_gtfunction uc_to_xefunction xe_uc_init_noallocfunction xe_uc_initfunction xe_uc_init_post_hwconfigfunction uc_resetfunction xe_uc_sanitizefunction xe_uc_sanitize_resetfunction vf_uc_load_hwfunction xe_uc_load_hwfunction xe_uc_reset_preparefunction xe_uc_stop_preparefunction xe_uc_stopfunction xe_uc_startfunction uc_reset_waitfunction xe_uc_suspend_preparefunction xe_uc_suspendfunction xe_uc_runtime_suspendfunction xe_uc_runtime_resumefunction xe_uc_declare_wedged
Annotated Snippet
// SPDX-License-Identifier: MIT
/*
* Copyright © 2022 Intel Corporation
*/
#include "xe_uc.h"
#include "xe_assert.h"
#include "xe_device.h"
#include "xe_gsc.h"
#include "xe_gt.h"
#include "xe_gt_printk.h"
#include "xe_gt_sriov_vf.h"
#include "xe_guc.h"
#include "xe_guc_pc.h"
#include "xe_guc_rc.h"
#include "xe_guc_engine_activity.h"
#include "xe_huc.h"
#include "xe_sriov.h"
#include "xe_wopcm.h"
static struct xe_gt *
uc_to_gt(struct xe_uc *uc)
{
return container_of(uc, struct xe_gt, uc);
}
static struct xe_device *
uc_to_xe(struct xe_uc *uc)
{
return gt_to_xe(uc_to_gt(uc));
}
/* Should be called once at driver load only */
int xe_uc_init_noalloc(struct xe_uc *uc)
{
int ret;
ret = xe_guc_init_noalloc(&uc->guc);
if (ret)
goto err;
/* HuC and GSC have no early dependencies and will be initialized during xe_uc_init(). */
return 0;
err:
xe_gt_err(uc_to_gt(uc), "Failed to early initialize uC (%pe)\n", ERR_PTR(ret));
return ret;
}
int xe_uc_init(struct xe_uc *uc)
{
int ret;
/*
* We call the GuC/HuC/GSC init functions even if GuC submission is off
* to correctly move our tracking of the FW state to "disabled".
*/
ret = xe_guc_init(&uc->guc);
if (ret)
goto err;
ret = xe_huc_init(&uc->huc);
if (ret)
goto err;
ret = xe_gsc_init(&uc->gsc);
if (ret)
goto err;
if (!xe_device_uc_enabled(uc_to_xe(uc)))
return 0;
if (!IS_SRIOV_VF(uc_to_xe(uc))) {
ret = xe_wopcm_init(&uc->wopcm);
if (ret)
goto err;
}
ret = xe_guc_min_load_for_hwconfig(&uc->guc);
if (ret)
goto err;
return 0;
err:
xe_gt_err(uc_to_gt(uc), "Failed to initialize uC (%pe)\n", ERR_PTR(ret));
return ret;
}
/**
Annotation
- Immediate include surface: `xe_uc.h`, `xe_assert.h`, `xe_device.h`, `xe_gsc.h`, `xe_gt.h`, `xe_gt_printk.h`, `xe_gt_sriov_vf.h`, `xe_guc.h`.
- Detected declarations: `function uc_to_gt`, `function uc_to_xe`, `function xe_uc_init_noalloc`, `function xe_uc_init`, `function xe_uc_init_post_hwconfig`, `function uc_reset`, `function xe_uc_sanitize`, `function xe_uc_sanitize_reset`, `function vf_uc_load_hw`, `function xe_uc_load_hw`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.