drivers/gpu/drm/xe/xe_vram_freq.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/xe/xe_vram_freq.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/xe/xe_vram_freq.c- Extension
.c- Size
- 3001 bytes
- Lines
- 124
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/sysfs.hdrm/drm_managed.hxe_device_types.hxe_pcode.hxe_pcode_api.hxe_tile_sysfs.hxe_vram_freq.h
Detected Declarations
function max_freq_showfunction min_freq_showfunction vram_freq_sysfs_finifunction xe_vram_freq_sysfs_init
Annotated Snippet
// SPDX-License-Identifier: MIT
/*
* Copyright © 2024 Intel Corporation
*/
#include <linux/sysfs.h>
#include <drm/drm_managed.h>
#include "xe_device_types.h"
#include "xe_pcode.h"
#include "xe_pcode_api.h"
#include "xe_tile_sysfs.h"
#include "xe_vram_freq.h"
/**
* DOC: Xe VRAM freq
*
* Provides sysfs entries for vram frequency in tile
*
* device/tile#/memory/freq0/max_freq - This is maximum frequency. This value is read-only as it
* is the fixed fuse point P0. It is not the system
* configuration.
* device/tile#/memory/freq0/min_freq - This is minimum frequency. This value is read-only as it
* is the fixed fuse point PN. It is not the system
* configuration.
*/
static struct xe_tile *dev_to_tile(struct device *dev)
{
return kobj_to_tile(dev->kobj.parent);
}
static ssize_t max_freq_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct xe_tile *tile = dev_to_tile(dev);
u32 val = 0, mbox;
int err;
mbox = REG_FIELD_PREP(PCODE_MB_COMMAND, PCODE_FREQUENCY_CONFIG)
| REG_FIELD_PREP(PCODE_MB_PARAM1, PCODE_MBOX_FC_SC_READ_FUSED_P0)
| REG_FIELD_PREP(PCODE_MB_PARAM2, PCODE_MBOX_DOMAIN_HBM);
err = xe_pcode_read(tile, mbox, &val, NULL);
if (err)
return err;
/* data_out - Fused P0 for domain ID in units of 50 MHz */
val *= 50;
return sysfs_emit(buf, "%u\n", val);
}
static DEVICE_ATTR_RO(max_freq);
static ssize_t min_freq_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct xe_tile *tile = dev_to_tile(dev);
u32 val = 0, mbox;
int err;
mbox = REG_FIELD_PREP(PCODE_MB_COMMAND, PCODE_FREQUENCY_CONFIG)
| REG_FIELD_PREP(PCODE_MB_PARAM1, PCODE_MBOX_FC_SC_READ_FUSED_PN)
| REG_FIELD_PREP(PCODE_MB_PARAM2, PCODE_MBOX_DOMAIN_HBM);
err = xe_pcode_read(tile, mbox, &val, NULL);
if (err)
return err;
/* data_out - Fused Pn for domain ID in units of 50 MHz */
val *= 50;
return sysfs_emit(buf, "%u\n", val);
}
static DEVICE_ATTR_RO(min_freq);
static struct attribute *freq_attrs[] = {
&dev_attr_max_freq.attr,
&dev_attr_min_freq.attr,
NULL
};
static const struct attribute_group freq_group_attrs = {
.name = "freq0",
.attrs = freq_attrs,
};
static void vram_freq_sysfs_fini(void *arg)
{
struct kobject *kobj = arg;
Annotation
- Immediate include surface: `linux/sysfs.h`, `drm/drm_managed.h`, `xe_device_types.h`, `xe_pcode.h`, `xe_pcode_api.h`, `xe_tile_sysfs.h`, `xe_vram_freq.h`.
- Detected declarations: `function max_freq_show`, `function min_freq_show`, `function vram_freq_sysfs_fini`, `function xe_vram_freq_sysfs_init`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.