drivers/gpu/drm/xe/xe_vsec.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/xe/xe_vsec.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/xe/xe_vsec.c- Extension
.c- Size
- 4811 bytes
- Lines
- 226
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/bits.hlinux/cleanup.hlinux/errno.hlinux/intel_vsec.hlinux/module.hlinux/mutex.hlinux/pci.hlinux/types.hxe_device.hxe_device_types.hxe_mmio.hxe_platform_types.hxe_pm.hxe_vsec.hregs/xe_pmt.h
Detected Declarations
enum xe_vsecenum record_idenum capabilityfunction xe_guid_decodefunction xe_pmt_telem_readfunction get_platform_infofunction xe_vsec_init
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/* Copyright © 2024 Intel Corporation */
#include <linux/bitfield.h>
#include <linux/bits.h>
#include <linux/cleanup.h>
#include <linux/errno.h>
#include <linux/intel_vsec.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/pci.h>
#include <linux/types.h>
#include "xe_device.h"
#include "xe_device_types.h"
#include "xe_mmio.h"
#include "xe_platform_types.h"
#include "xe_pm.h"
#include "xe_vsec.h"
#include "regs/xe_pmt.h"
/* PMT GUID value for BMG devices. NOTE: this is NOT a PCI id */
#define BMG_DEVICE_ID 0xE2F8
static struct intel_vsec_header bmg_telemetry = {
.rev = 1,
.length = 0x10,
.id = VSEC_ID_TELEMETRY,
.num_entries = 2,
.entry_size = 4,
.tbir = 0,
.offset = BMG_DISCOVERY_OFFSET,
};
static struct intel_vsec_header bmg_crashlog = {
.rev = 1,
.length = 0x10,
.id = VSEC_ID_CRASHLOG,
.num_entries = 2,
.entry_size = 6,
.tbir = 0,
.offset = BMG_DISCOVERY_OFFSET + 0x60,
};
static struct intel_vsec_header *bmg_capabilities[] = {
&bmg_telemetry,
&bmg_crashlog,
NULL
};
enum xe_vsec {
XE_VSEC_UNKNOWN = 0,
XE_VSEC_BMG,
};
static struct intel_vsec_platform_info xe_vsec_info[] = {
[XE_VSEC_BMG] = {
.caps = VSEC_CAP_TELEMETRY | VSEC_CAP_CRASHLOG,
.headers = bmg_capabilities,
},
{ }
};
/*
* The GUID will have the following bits to decode:
* [0:3] - {Telemetry space iteration number (0,1,..)}
* [4:7] - Segment (SEGMENT_INDEPENDENT-0, Client-1, Server-2)
* [8:11] - SOC_SKU
* [12:27] – Device ID – changes for each down bin SKU’s
* [28:29] - Capability Type (Crashlog-0, Telemetry Aggregator-1, Watcher-2)
* [30:31] - Record-ID (0-PUNIT, 1-OOBMSM_0, 2-OOBMSM_1)
*/
#define GUID_TELEM_ITERATION GENMASK(3, 0)
#define GUID_SEGMENT GENMASK(7, 4)
#define GUID_SOC_SKU GENMASK(11, 8)
#define GUID_DEVICE_ID GENMASK(27, 12)
#define GUID_CAP_TYPE GENMASK(29, 28)
#define GUID_RECORD_ID GENMASK(31, 30)
#define PUNIT_TELEMETRY_OFFSET 0x0200
#define PUNIT_WATCHER_OFFSET 0x14A0
#define OOBMSM_0_WATCHER_OFFSET 0x18D8
#define OOBMSM_1_TELEMETRY_OFFSET 0x1000
enum record_id {
PUNIT,
OOBMSM_0,
OOBMSM_1,
};
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/bits.h`, `linux/cleanup.h`, `linux/errno.h`, `linux/intel_vsec.h`, `linux/module.h`, `linux/mutex.h`, `linux/pci.h`.
- Detected declarations: `enum xe_vsec`, `enum record_id`, `enum capability`, `function xe_guid_decode`, `function xe_pmt_telem_read`, `function get_platform_info`, `function xe_vsec_init`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.