drivers/gpu/drm/xlnx/zynqmp_disp.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/xlnx/zynqmp_disp.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/xlnx/zynqmp_disp.c- Extension
.c- Size
- 40315 bytes
- Lines
- 1456
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
drm/drm_fb_dma_helper.hdrm/drm_fourcc.hdrm/drm_framebuffer.hdrm/drm_plane.hlinux/clk.hlinux/dma/xilinx_dpdma.hlinux/dma-mapping.hlinux/dmaengine.hlinux/media-bus-format.hlinux/module.hlinux/of.hlinux/platform_device.hlinux/slab.hzynqmp_disp.hzynqmp_disp_regs.hzynqmp_dp.hzynqmp_dpsub.h
Detected Declarations
struct zynqmp_disp_formatstruct zynqmp_disp_layer_dmastruct zynqmp_disp_layer_infostruct zynqmp_disp_layerstruct zynqmp_dispenum zynqmp_dpsub_layer_modefunction zynqmp_disp_avbuf_readfunction zynqmp_disp_avbuf_writefunction zynqmp_disp_layer_is_videofunction zynqmp_disp_avbuf_set_formatfunction zynqmp_disp_avbuf_set_clocks_sourcesfunction allfunction allfunction zynqmp_disp_avbuf_enable_audiofunction zynqmp_disp_avbuf_disable_audiofunction zynqmp_disp_avbuf_enable_videofunction zynqmp_disp_avbuf_disable_videofunction zynqmp_disp_avbuf_enablefunction zynqmp_disp_avbuf_disablefunction Blenderfunction zynqmp_disp_blend_set_output_formatfunction tofunction zynqmp_disp_blend_set_global_alphafunction zynqmp_disp_blend_layer_set_cscfunction zynqmp_disp_blend_layer_enablefunction zynqmp_disp_blend_layer_disablefunction zynqmp_disp_layer_find_formatfunction zynqmp_disp_layer_find_live_formatfunction zynqmp_disp_layer_updatefunction zynqmp_disp_layer_disablefunction zynqmp_disp_layer_set_formatfunction zynqmp_disp_layer_set_live_formatfunction zynqmp_disp_layer_updatefunction zynqmp_disp_layer_release_dmafunction zynqmp_disp_destroy_layersfunction zynqmp_disp_layer_request_dmafunction zynqmp_disp_create_layersfunction zynqmp_disp_enablefunction zynqmp_disp_disablefunction zynqmp_disp_setup_clockfunction zynqmp_disp_probefunction zynqmp_disp_remove
Annotated Snippet
struct zynqmp_disp_format {
u32 drm_fmt;
u32 bus_fmt;
u32 buf_fmt;
bool swap;
const u32 *sf;
};
/**
* struct zynqmp_disp_layer_dma - DMA channel for one data plane of a layer
* @chan: DMA channel
* @xt: Interleaved DMA descriptor template
* @sgl: Data chunk for dma_interleaved_template
*/
struct zynqmp_disp_layer_dma {
struct dma_chan *chan;
struct dma_interleaved_template xt;
struct data_chunk sgl;
};
/**
* struct zynqmp_disp_layer_info - Static layer information
* @formats: Array of supported formats
* @num_formats: Number of formats in @formats array
* @num_channels: Number of DMA channels
*/
struct zynqmp_disp_layer_info {
const struct zynqmp_disp_format *formats;
unsigned int num_formats;
unsigned int num_channels;
};
/**
* struct zynqmp_disp_layer - Display layer
* @id: Layer ID
* @disp: Back pointer to struct zynqmp_disp
* @info: Static layer information
* @dmas: DMA channels
* @disp_fmt: Current format information
* @drm_fmt: Current DRM format information
* @mode: Current operation mode
*/
struct zynqmp_disp_layer {
enum zynqmp_dpsub_layer_id id;
struct zynqmp_disp *disp;
const struct zynqmp_disp_layer_info *info;
struct zynqmp_disp_layer_dma dmas[ZYNQMP_DISP_MAX_NUM_SUB_PLANES];
const struct zynqmp_disp_format *disp_fmt;
const struct drm_format_info *drm_fmt;
enum zynqmp_dpsub_layer_mode mode;
};
/**
* struct zynqmp_disp - Display controller
* @dev: Device structure
* @dpsub: Display subsystem
* @blend: Register I/O base address for the blender
* @avbuf: Register I/O base address for the audio/video buffer manager
* @layers: Layers (planes)
*/
struct zynqmp_disp {
struct device *dev;
struct zynqmp_dpsub *dpsub;
void __iomem *blend;
void __iomem *avbuf;
struct zynqmp_disp_layer layers[ZYNQMP_DPSUB_NUM_LAYERS];
};
/* -----------------------------------------------------------------------------
* Audio/Video Buffer Manager
*/
static const u32 scaling_factors_444[] = {
ZYNQMP_DISP_AV_BUF_4BIT_SF,
ZYNQMP_DISP_AV_BUF_4BIT_SF,
ZYNQMP_DISP_AV_BUF_4BIT_SF,
};
static const u32 scaling_factors_555[] = {
ZYNQMP_DISP_AV_BUF_5BIT_SF,
ZYNQMP_DISP_AV_BUF_5BIT_SF,
ZYNQMP_DISP_AV_BUF_5BIT_SF,
};
static const u32 scaling_factors_565[] = {
ZYNQMP_DISP_AV_BUF_5BIT_SF,
Annotation
- Immediate include surface: `drm/drm_fb_dma_helper.h`, `drm/drm_fourcc.h`, `drm/drm_framebuffer.h`, `drm/drm_plane.h`, `linux/clk.h`, `linux/dma/xilinx_dpdma.h`, `linux/dma-mapping.h`, `linux/dmaengine.h`.
- Detected declarations: `struct zynqmp_disp_format`, `struct zynqmp_disp_layer_dma`, `struct zynqmp_disp_layer_info`, `struct zynqmp_disp_layer`, `struct zynqmp_disp`, `enum zynqmp_dpsub_layer_mode`, `function zynqmp_disp_avbuf_read`, `function zynqmp_disp_avbuf_write`, `function zynqmp_disp_layer_is_video`, `function zynqmp_disp_avbuf_set_format`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.