drivers/hid/intel-thc-hid/intel-thc/intel-thc-dma.c
Source file repositories/reference/linux-study-clean/drivers/hid/intel-thc-hid/intel-thc/intel-thc-dma.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/hid/intel-thc-hid/intel-thc/intel-thc-dma.c- Extension
.c- Size
- 30147 bytes
- Lines
- 1017
- Domain
- Driver Families
- Bucket
- drivers/hid
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/delay.hlinux/overflow.hlinux/regmap.hlinux/scatterlist.hintel-thc-dev.hintel-thc-dma.hintel-thc-hw.h
Detected Declarations
function dma_set_prd_base_addrfunction dma_set_start_bitfunction dma_set_prd_controlfunction dma_clear_prd_controlfunction dma_get_read_pointerfunction dma_get_write_pointerfunction dma_set_write_pointerfunction dma_get_max_packet_sizefunction dma_set_max_packet_sizefunction thc_copy_one_sgl_to_prdfunction for_each_sgfunction thc_copy_sgls_to_prdfunction setup_dma_buffersfunction thc_reset_dma_settingsfunction release_dma_buffersfunction thc_dma_set_max_packet_sizesfunction thc_dma_allocatefunction thc_dma_releasefunction calc_prd_entries_numfunction calc_message_lenfunction thc_dma_configurefunction thc_dma_unconfigurefunction thc_wait_for_dma_pausefunction read_dma_bufferfunction update_write_pointerfunction is_dma_buf_emptyfunction thc_dma_readfunction thc_rxdma_readfunction thc_swdma_read_startfunction thc_swdma_read_completionfunction thc_swdma_readfunction write_dma_bufferfunction for_each_sgfunction thc_ensure_performance_limitationsfunction thc_dma_write_completionfunction thc_dma_write
Annotated Snippet
if (dma_config->dma_channel == THC_RXDMA2) {
mbits = FIELD_PREP(THC_M_PRT_DEVINT_CFG_1_THC_M_PRT_INTTYP_DATA_VAL,
THC_BITMASK_INTERRUPT_TYPE_DATA);
mask = THC_M_PRT_DEVINT_CFG_1_THC_M_PRT_INTTYP_DATA_VAL;
regmap_write_bits(dev->thc_regmap,
THC_M_PRT_DEVINT_CFG_1_OFFSET, mask, mbits);
}
mbits = THC_M_PRT_READ_DMA_CNTRL_IE_EOF |
THC_M_PRT_READ_DMA_CNTRL_SOO |
THC_M_PRT_READ_DMA_CNTRL_IE_STALL |
THC_M_PRT_READ_DMA_CNTRL_IE_ERROR |
THC_M_PRT_READ_DMA_CNTRL_START;
mask = THC_M_PRT_READ_DMA_CNTRL_TPCWP | mbits;
mask |= THC_M_PRT_READ_DMA_CNTRL_INT_SW_DMA_EN;
ctrl = FIELD_PREP(THC_M_PRT_READ_DMA_CNTRL_TPCWP, THC_POINTER_WRAPAROUND) | mbits;
offset = dma_config->dma_channel == THC_RXDMA1 ?
THC_M_PRT_READ_DMA_CNTRL_1_OFFSET : THC_M_PRT_READ_DMA_CNTRL_2_OFFSET;
regmap_write_bits(dev->thc_regmap, offset, mask, ctrl);
break;
case THC_SWDMA:
mbits = THC_M_PRT_READ_DMA_CNTRL_IE_DMACPL |
THC_M_PRT_READ_DMA_CNTRL_IE_IOC |
THC_M_PRT_READ_DMA_CNTRL_SOO |
THC_M_PRT_READ_DMA_CNTRL_START;
mask = THC_M_PRT_READ_DMA_CNTRL_TPCWP | mbits;
ctrl = FIELD_PREP(THC_M_PRT_READ_DMA_CNTRL_TPCWP, THC_POINTER_WRAPAROUND) | mbits;
regmap_write_bits(dev->thc_regmap, THC_M_PRT_READ_DMA_CNTRL_SW_OFFSET,
mask, ctrl);
break;
case THC_TXDMA:
regmap_write_bits(dev->thc_regmap, THC_M_PRT_WRITE_INT_STS_OFFSET,
THC_M_PRT_WRITE_INT_STS_THC_WRDMA_CMPL_STATUS,
THC_M_PRT_WRITE_INT_STS_THC_WRDMA_CMPL_STATUS);
/* Select interrupt or polling method upon Write completion */
if (dev->dma_ctx->use_write_interrupts)
data = THC_M_PRT_WRITE_DMA_CNTRL_THC_WRDMA_IE_IOC_DMACPL;
else
data = 0;
data |= THC_M_PRT_WRITE_DMA_CNTRL_THC_WRDMA_START;
mask = THC_M_PRT_WRITE_DMA_CNTRL_THC_WRDMA_IE_IOC_DMACPL |
THC_M_PRT_WRITE_DMA_CNTRL_THC_WRDMA_START;
regmap_write_bits(dev->thc_regmap, THC_M_PRT_WRITE_DMA_CNTRL_OFFSET,
mask, data);
break;
default:
break;
}
}
static void dma_set_prd_control(struct thc_device *dev, u8 entry_count, u8 cb_depth,
struct thc_dma_configuration *dma_config)
{
u32 ctrl, mask;
if (!dma_config->is_enabled)
return;
if (dma_config->dma_channel == THC_TXDMA) {
mask = THC_M_PRT_WRITE_DMA_CNTRL_THC_WRDMA_PTEC;
ctrl = FIELD_PREP(THC_M_PRT_WRITE_DMA_CNTRL_THC_WRDMA_PTEC, entry_count);
} else {
mask = THC_M_PRT_RPRD_CNTRL_PTEC | THC_M_PRT_RPRD_CNTRL_PCD;
ctrl = FIELD_PREP(THC_M_PRT_RPRD_CNTRL_PTEC, entry_count) |
FIELD_PREP(THC_M_PRT_RPRD_CNTRL_PCD, cb_depth);
}
regmap_write_bits(dev->thc_regmap, dma_config->prd_cntrl, mask, ctrl);
}
static void dma_clear_prd_control(struct thc_device *dev,
struct thc_dma_configuration *dma_config)
{
u32 mask;
if (!dma_config->is_enabled)
return;
if (dma_config->dma_channel == THC_TXDMA)
mask = THC_M_PRT_WRITE_DMA_CNTRL_THC_WRDMA_PTEC;
else
mask = THC_M_PRT_RPRD_CNTRL_PTEC | THC_M_PRT_RPRD_CNTRL_PCD;
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/delay.h`, `linux/overflow.h`, `linux/regmap.h`, `linux/scatterlist.h`, `intel-thc-dev.h`, `intel-thc-dma.h`, `intel-thc-hw.h`.
- Detected declarations: `function dma_set_prd_base_addr`, `function dma_set_start_bit`, `function dma_set_prd_control`, `function dma_clear_prd_control`, `function dma_get_read_pointer`, `function dma_get_write_pointer`, `function dma_set_write_pointer`, `function dma_get_max_packet_size`, `function dma_set_max_packet_size`, `function thc_copy_one_sgl_to_prd`.
- Atlas domain: Driver Families / drivers/hid.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.