drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
Source file repositories/reference/linux-study-clean/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/hwtracing/coresight/coresight-etm4x-sysfs.c- Extension
.c- Size
- 71835 bytes
- Lines
- 2605
- Domain
- Driver Families
- Bucket
- drivers/hwtracing
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/coresight.hlinux/pid_namespace.hlinux/pm_runtime.hlinux/sysfs.hcoresight-etm4x.hcoresight-priv.hcoresight-syscfg.h
Detected Declarations
struct etmv4_regfunction Copyrightfunction nr_pe_cmp_showfunction nr_addr_cmp_showfunction nr_cntr_showfunction nr_ext_inp_showfunction numcidc_showfunction numvmidc_showfunction nrseqstate_showfunction nr_resource_showfunction nr_ss_cmp_showfunction reset_storefunction mode_showfunction mode_storefunction pe_showfunction pe_storefunction event_showfunction event_storefunction event_instren_showfunction event_instren_storefunction event_ts_showfunction event_ts_storefunction syncfreq_showfunction syncfreq_storefunction cyc_threshold_showfunction cyc_threshold_storefunction bb_ctrl_showfunction bb_ctrl_storefunction event_vinst_showfunction event_vinst_storefunction s_exlevel_vinst_showfunction s_exlevel_vinst_storefunction ns_exlevel_vinst_showfunction ns_exlevel_vinst_storefunction addr_idx_showfunction addr_idx_storefunction addr_instdatatype_showfunction addr_instdatatype_storefunction addr_single_showfunction addr_single_storefunction addr_range_showfunction addr_range_storefunction addr_start_showfunction addr_start_storefunction addr_stop_showfunction addr_stop_storefunction addr_ctxtype_showfunction addr_ctxtype_store
Annotated Snippet
struct etmv4_reg {
struct coresight_device *csdev;
u32 offset;
u32 data;
};
static void do_smp_cross_read(void *data)
{
struct etmv4_reg *reg = data;
reg->data = etm4x_relaxed_read32(®->csdev->access, reg->offset);
}
static u32 etmv4_cross_read(const struct etmv4_drvdata *drvdata, u32 offset)
{
struct etmv4_reg reg;
reg.offset = offset;
reg.csdev = drvdata->csdev;
/*
* smp cross call ensures the CPU will be powered up before
* accessing the ETMv4 trace core registers
*/
smp_call_function_single(drvdata->cpu, do_smp_cross_read, ®, 1);
return reg.data;
}
static u32 coresight_etm4x_attr_to_offset(struct device_attribute *attr)
{
struct dev_ext_attribute *eattr;
eattr = container_of(attr, struct dev_ext_attribute, attr);
return (u32)(unsigned long)eattr->var;
}
static ssize_t coresight_etm4x_reg_show(struct device *dev,
struct device_attribute *d_attr,
char *buf)
{
u32 val, offset;
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
offset = coresight_etm4x_attr_to_offset(d_attr);
pm_runtime_get_sync(dev->parent);
val = etmv4_cross_read(drvdata, offset);
pm_runtime_put_sync(dev->parent);
return scnprintf(buf, PAGE_SIZE, "0x%x\n", val);
}
static bool
etm4x_register_implemented(struct etmv4_drvdata *drvdata, u32 offset)
{
switch (offset) {
ETM_COMMON_SYSREG_LIST_CASES
/*
* Common registers to ETE & ETM4x accessible via system
* instructions are always implemented.
*/
return true;
ETM4x_ONLY_SYSREG_LIST_CASES
/*
* We only support etm4x and ete. So if the device is not
* ETE, it must be ETMv4x.
*/
return !etm4x_is_ete(drvdata);
ETM4x_MMAP_LIST_CASES
/*
* Registers accessible only via memory-mapped registers
* must not be accessed via system instructions.
* We cannot access the drvdata->csdev here, as this
* function is called during the device creation, via
* coresight_register() and the csdev is not initialized
* until that is done. So rely on the drvdata->base to
* detect if we have a memory mapped access.
* Also ETE doesn't implement memory mapped access, thus
* it is sufficient to check that we are using mmio.
*/
return !!drvdata->base;
ETE_ONLY_SYSREG_LIST_CASES
return etm4x_is_ete(drvdata);
}
return false;
}
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/coresight.h`, `linux/pid_namespace.h`, `linux/pm_runtime.h`, `linux/sysfs.h`, `coresight-etm4x.h`, `coresight-priv.h`, `coresight-syscfg.h`.
- Detected declarations: `struct etmv4_reg`, `function Copyright`, `function nr_pe_cmp_show`, `function nr_addr_cmp_show`, `function nr_cntr_show`, `function nr_ext_inp_show`, `function numcidc_show`, `function numvmidc_show`, `function nrseqstate_show`, `function nr_resource_show`.
- Atlas domain: Driver Families / drivers/hwtracing.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.