drivers/i2c/busses/i2c-npcm7xx.c

File Facts

System

Linux kernel

Corpus path

drivers/i2c/busses/i2c-npcm7xx.c

Extension

.c

Size

71024 bytes

Lines

2622

Domain

Driver Families

Bucket

drivers/i2c

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
• Touches IRQ or DMA behavior; this matters for the representative real-device path.
• Allocates kernel memory; connect allocation flags and lifetime to context constraints.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/bitfield.h
• linux/clk.h
• linux/debugfs.h
• linux/errno.h
• linux/i2c.h
• linux/interrupt.h
• linux/iopoll.h
• linux/irq.h
• linux/jiffies.h
• linux/kernel.h
• linux/mfd/syscon.h
• linux/module.h
• linux/of.h
• linux/platform_device.h
• linux/regmap.h

Detected Declarations

• struct smb_timing_t
• struct npcm_i2c_data
• struct npcm_i2c
• enum i2c_mode
• enum i2c_state_ind
• enum i2c_oper
• enum i2c_bank
• enum i2c_state
• enum i2c_addr
• function npcm_i2c_select_bank
• function npcm_i2c_init_params
• function npcm_i2c_wr_byte
• function npcm_i2c_rd_byte
• function npcm_i2c_get_SCL
• function npcm_i2c_get_SDA
• function npcm_i2c_get_index
• function npcm_i2c_is_quick
• function npcm_i2c_disable
• function npcm_i2c_enable
• function npcm_i2c_eob_int
• function npcm_i2c_tx_fifo_empty
• function npcm_i2c_rx_fifo_full
• function npcm_i2c_clear_fifo_int
• function npcm_i2c_clear_tx_fifo
• function npcm_i2c_clear_rx_fifo
• function npcm_i2c_int_enable
• function npcm_i2c_master_start
• function npcm_i2c_master_stop
• function npcm_i2c_stall_after_start
• function npcm_i2c_nack
• function npcm_i2c_clear_master_status
• function npcm_i2c_slave_int_enable
• function npcm_i2c_slave_enable
• function npcm_i2c_reset
• function npcm_i2c_is_master
• function npcm_i2c_callback
• function npcm_i2c_fifo_usage
• function npcm_i2c_write_to_fifo_master
• function npcm_i2c_set_fifo
• function npcm_i2c_read_fifo
• function npcm_i2c_master_abort
• function npcm_i2c_get_slave_addr
• function npcm_i2c_remove_slave_addr
• function npcm_i2c_write_fifo_slave
• function npcm_i2c_read_fifo_slave
• function npcm_i2c_slave_get_wr_buf
• function npcm_i2c_slave_send_rd_buf
• function master

Annotated Snippet

struct smb_timing_t {
	u32 core_clk;
	u8 hldt;
	u8 dbcnt;
	u16 sclfrq;
	u8 scllt;
	u8 sclht;
	bool fast_mode;
};

static struct smb_timing_t smb_timing_100khz[] = {
	{
		.core_clk = 100000000, .hldt = 0x2A, .dbcnt = 0x4,
		.sclfrq = 0xFB, .scllt = 0x0, .sclht = 0x0,
		.fast_mode = false,
	},
	{
		.core_clk = 62500000, .hldt = 0x2A, .dbcnt = 0x1,
		.sclfrq = 0x9D, .scllt = 0x0, .sclht = 0x0,
		.fast_mode = false,
	},
	{
		.core_clk = 50000000, .hldt = 0x2A, .dbcnt = 0x1,
		.sclfrq = 0x7E, .scllt = 0x0, .sclht = 0x0,
		.fast_mode = false,
	},
	{
		.core_clk = 48000000, .hldt = 0x2A, .dbcnt = 0x1,
		.sclfrq = 0x79, .scllt = 0x0, .sclht = 0x0,
		.fast_mode = false,
	},
	{
		.core_clk = 40000000, .hldt = 0x2A, .dbcnt = 0x1,
		.sclfrq = 0x65, .scllt = 0x0, .sclht = 0x0,
		.fast_mode = false,
	},
	{
		.core_clk = 30000000, .hldt = 0x2A, .dbcnt = 0x1,
		.sclfrq = 0x4C, .scllt = 0x0, .sclht = 0x0,
		.fast_mode = false,
	},
	{
		.core_clk = 29000000, .hldt = 0x2A, .dbcnt = 0x1,
		.sclfrq = 0x49, .scllt = 0x0, .sclht = 0x0,
		.fast_mode = false,
	},
	{
		.core_clk = 26000000, .hldt = 0x2A, .dbcnt = 0x1,
		.sclfrq = 0x42, .scllt = 0x0, .sclht = 0x0,
		.fast_mode = false,
	},
	{
		.core_clk = 25000000, .hldt = 0x2A, .dbcnt = 0x1,
		.sclfrq = 0x3F, .scllt = 0x0, .sclht = 0x0,
		.fast_mode = false,
	},
	{
		.core_clk = 24000000, .hldt = 0x2A, .dbcnt = 0x1,
		.sclfrq = 0x3D, .scllt = 0x0, .sclht = 0x0,
		.fast_mode = false,
	},
	{
		.core_clk = 20000000, .hldt = 0x2A, .dbcnt = 0x1,
		.sclfrq = 0x33, .scllt = 0x0, .sclht = 0x0,
		.fast_mode = false,
	},
	{
		.core_clk = 16180000, .hldt = 0x2A, .dbcnt = 0x1,
		.sclfrq = 0x29, .scllt = 0x0, .sclht = 0x0,
		.fast_mode = false,
	},
	{
		.core_clk = 15000000, .hldt = 0x23, .dbcnt = 0x1,
		.sclfrq = 0x26, .scllt = 0x0, .sclht = 0x0,
		.fast_mode = false,
	},
	{
		.core_clk = 13000000, .hldt = 0x1D, .dbcnt = 0x1,
		.sclfrq = 0x21, .scllt = 0x0, .sclht = 0x0,
		.fast_mode = false,
	},
	{
		.core_clk = 12000000, .hldt = 0x1B, .dbcnt = 0x1,
		.sclfrq = 0x1F, .scllt = 0x0, .sclht = 0x0,
		.fast_mode = false,
	},
	{
		.core_clk = 10000000, .hldt = 0x18, .dbcnt = 0x1,
		.sclfrq = 0x1A, .scllt = 0x0, .sclht = 0x0,
		.fast_mode = false,

Annotation

• Immediate include surface: `linux/bitfield.h`, `linux/clk.h`, `linux/debugfs.h`, `linux/errno.h`, `linux/i2c.h`, `linux/interrupt.h`, `linux/iopoll.h`, `linux/irq.h`.
• Detected declarations: `struct smb_timing_t`, `struct npcm_i2c_data`, `struct npcm_i2c`, `enum i2c_mode`, `enum i2c_state_ind`, `enum i2c_oper`, `enum i2c_bank`, `enum i2c_state`, `enum i2c_addr`, `function npcm_i2c_select_bank`.
• Atlas domain: Driver Families / drivers/i2c.
• Implementation status: source implementation candidate.
• Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
• IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.