drivers/i2c/busses/i2c-qup.c

File Facts

System

Linux kernel

Corpus path

drivers/i2c/busses/i2c-qup.c

Extension

.c

Size

50518 bytes

Lines

2026

Domain

Driver Families

Bucket

drivers/i2c

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Touches IRQ or DMA behavior; this matters for the representative real-device path.
• Allocates kernel memory; connect allocation flags and lifetime to context constraints.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/acpi.h
• linux/atomic.h
• linux/clk.h
• linux/delay.h
• linux/dmaengine.h
• linux/dmapool.h
• linux/dma-mapping.h
• linux/err.h
• linux/i2c.h
• linux/interconnect.h
• linux/interrupt.h
• linux/io.h
• linux/module.h
• linux/platform_device.h
• linux/pm_runtime.h
• linux/property.h
• linux/scatterlist.h

Detected Declarations

• struct qup_i2c_block
• struct qup_i2c_tag
• struct qup_i2c_bam
• struct qup_i2c_dev
• function qup_i2c_interrupt
• function qup_i2c_poll_state_mask
• function qup_i2c_poll_state
• function qup_i2c_flush
• function qup_i2c_poll_state_valid
• function qup_i2c_poll_state_i2c_master
• function qup_i2c_change_state
• function qup_i2c_bus_active
• function qup_i2c_vote_bw
• function qup_i2c_write_tx_fifo_v1
• function qup_i2c_set_blk_data
• function qup_i2c_get_data_len
• function qup_i2c_check_msg_len
• function qup_i2c_set_tags_smb
• function qup_i2c_set_tags
• function qup_i2c_bam_cb
• function qup_sg_set_buf
• function qup_i2c_rel_dma
• function qup_i2c_req_dma
• function qup_i2c_bam_make_desc
• function qup_i2c_bam_schedule_desc
• function qup_i2c_bam_clear_tag_buffers
• function qup_i2c_bam_xfer
• function qup_i2c_wait_for_complete
• function qup_i2c_read_rx_fifo_v1
• function qup_i2c_write_rx_tags_v1
• function qup_i2c_conf_v1
• function qup_i2c_clear_blk_v1
• function qup_i2c_conf_xfer_v1
• function qup_i2c_write_one
• function qup_i2c_read_one
• function qup_i2c_xfer
• function qup_i2c_conf_count_v2
• function mode
• function qup_i2c_clear_blk_v2
• function qup_i2c_recv_data
• function qup_i2c_recv_tags
• function qup_i2c_read_rx_fifo_v2
• function basis
• function qup_i2c_write_rx_tags_v2
• function qup_i2c_write_tx_fifo_v2
• function qup_i2c_conf_xfer_v2
• function qup_i2c_xfer_v2_msg
• function qup_i2c_determine_mode_v2

Annotated Snippet

struct qup_i2c_block {
	int		count;
	int		pos;
	int		tx_tag_len;
	int		rx_tag_len;
	int		data_len;
	int		cur_blk_len;
	int		total_tx_len;
	int		total_rx_len;
	int		tx_fifo_data_pos;
	int		tx_fifo_free;
	int		rx_fifo_data_pos;
	int		fifo_available;
	u32		tx_fifo_data;
	u32		rx_fifo_data;
	u8		*cur_data;
	u8		*cur_tx_tags;
	bool		tx_tags_sent;
	bool		send_last_word;
	bool		rx_tags_fetched;
	bool		rx_bytes_read;
	bool		is_tx_blk_mode;
	bool		is_rx_blk_mode;
	u8		tags[6];
};

struct qup_i2c_tag {
	u8 *start;
	dma_addr_t addr;
};

struct qup_i2c_bam {
	struct	qup_i2c_tag tag;
	struct	dma_chan *dma;
	struct	scatterlist *sg;
	unsigned int sg_cnt;
};

struct qup_i2c_dev {
	struct device		*dev;
	void __iomem		*base;
	int			irq;
	struct clk		*clk;
	struct clk		*pclk;
	struct icc_path		*icc_path;
	struct i2c_adapter	adap;

	int			clk_ctl;
	int			out_fifo_sz;
	int			in_fifo_sz;
	int			out_blk_sz;
	int			in_blk_sz;

	int			blk_xfer_limit;
	unsigned long		one_byte_t;
	unsigned long		xfer_timeout;
	struct qup_i2c_block	blk;

	struct i2c_msg		*msg;
	/* Current posion in user message buffer */
	int			pos;
	/* I2C protocol errors */
	u32			bus_err;
	/* QUP core errors */
	u32			qup_err;

	/* To check if this is the last msg */
	bool			is_last;
	bool			is_smbus_read;

	/* To configure when bus is in run state */
	u32			config_run;

	/* bandwidth votes */
	u32			src_clk_freq;
	u32			cur_bw_clk_freq;

	/* dma parameters */
	bool			is_dma;
	/* To check if the current transfer is using DMA */
	bool			use_dma;
	unsigned int		max_xfer_sg_len;
	unsigned int		tag_buf_pos;
	/* The threshold length above which block mode will be used */
	unsigned int		blk_mode_threshold;
	struct			dma_pool *dpool;
	struct			qup_i2c_tag start_tag;
	struct			qup_i2c_bam brx;
	struct			qup_i2c_bam btx;

Annotation

• Immediate include surface: `linux/acpi.h`, `linux/atomic.h`, `linux/clk.h`, `linux/delay.h`, `linux/dmaengine.h`, `linux/dmapool.h`, `linux/dma-mapping.h`, `linux/err.h`.
• Detected declarations: `struct qup_i2c_block`, `struct qup_i2c_tag`, `struct qup_i2c_bam`, `struct qup_i2c_dev`, `function qup_i2c_interrupt`, `function qup_i2c_poll_state_mask`, `function qup_i2c_poll_state`, `function qup_i2c_flush`, `function qup_i2c_poll_state_valid`, `function qup_i2c_poll_state_i2c_master`.
• Atlas domain: Driver Families / drivers/i2c.
• Implementation status: source implementation candidate.
• IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.