drivers/i2c/busses/i2c-xiic.c

Source file repositories/reference/linux-study-clean/drivers/i2c/busses/i2c-xiic.c

File Facts

System
Linux kernel
Corpus path
drivers/i2c/busses/i2c-xiic.c
Extension
.c
Size
43388 bytes
Lines
1571
Domain
Driver Families
Bucket
drivers/i2c
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct xiic_i2c {
	struct device *dev;
	void __iomem *base;
	struct completion completion;
	struct i2c_adapter adap;
	struct i2c_msg *tx_msg;
	struct mutex lock;
	unsigned int tx_pos;
	unsigned int nmsgs;
	struct i2c_msg *rx_msg;
	int rx_pos;
	enum xiic_endian endianness;
	struct clk *clk;
	enum xilinx_i2c_state state;
	bool singlemaster;
	bool dynamic;
	bool prev_msg_tx;
	u32 quirks;
	bool smbus_block_read;
	unsigned long input_clk;
	unsigned int i2c_clk;
	bool atomic;
	spinlock_t atomic_lock;		/* Lock for atomic transfer mode */
	enum xilinx_i2c_state atomic_xfer_state;
};

struct xiic_version_data {
	u32 quirks;
};

/**
 * struct timing_regs - AXI I2C timing registers that depend on I2C spec
 * @tsusta: setup time for a repeated START condition
 * @tsusto: setup time for a STOP condition
 * @thdsta: hold time for a repeated START condition
 * @tsudat: setup time for data
 * @tbuf: bus free time between STOP and START
 */
struct timing_regs {
	unsigned int tsusta;
	unsigned int tsusto;
	unsigned int thdsta;
	unsigned int tsudat;
	unsigned int tbuf;
};

/* Reg values in ns derived from I2C spec and AXI I2C PG for different frequencies */
static const struct timing_regs timing_reg_values[] = {
	{ 5700, 5000, 4300, 550, 5000 }, /* Reg values for 100KHz */
	{ 900, 900, 900, 400, 1600 },    /* Reg values for 400KHz */
	{ 380, 380, 380, 170, 620 },     /* Reg values for 1MHz   */
};

#define XIIC_MSB_OFFSET 0
#define XIIC_REG_OFFSET (0x100 + XIIC_MSB_OFFSET)

/*
 * Register offsets in bytes from RegisterBase. Three is added to the
 * base offset to access LSB (IBM style) of the word
 */
#define XIIC_CR_REG_OFFSET   (0x00 + XIIC_REG_OFFSET)	/* Control Register   */
#define XIIC_SR_REG_OFFSET   (0x04 + XIIC_REG_OFFSET)	/* Status Register    */
#define XIIC_DTR_REG_OFFSET  (0x08 + XIIC_REG_OFFSET)	/* Data Tx Register   */
#define XIIC_DRR_REG_OFFSET  (0x0C + XIIC_REG_OFFSET)	/* Data Rx Register   */
#define XIIC_ADR_REG_OFFSET  (0x10 + XIIC_REG_OFFSET)	/* Address Register   */
#define XIIC_TFO_REG_OFFSET  (0x14 + XIIC_REG_OFFSET)	/* Tx FIFO Occupancy  */
#define XIIC_RFO_REG_OFFSET  (0x18 + XIIC_REG_OFFSET)	/* Rx FIFO Occupancy  */
#define XIIC_TBA_REG_OFFSET  (0x1C + XIIC_REG_OFFSET)	/* 10 Bit Address reg */
#define XIIC_RFD_REG_OFFSET  (0x20 + XIIC_REG_OFFSET)	/* Rx FIFO Depth reg  */
#define XIIC_GPO_REG_OFFSET  (0x24 + XIIC_REG_OFFSET)	/* Output Register    */

/*
 * Timing register offsets from RegisterBase. These are used only for
 * setting i2c clock frequency for the line.
 */
#define XIIC_TSUSTA_REG_OFFSET (0x28 + XIIC_REG_OFFSET) /* TSUSTA Register */
#define XIIC_TSUSTO_REG_OFFSET (0x2C + XIIC_REG_OFFSET) /* TSUSTO Register */
#define XIIC_THDSTA_REG_OFFSET (0x30 + XIIC_REG_OFFSET) /* THDSTA Register */
#define XIIC_TSUDAT_REG_OFFSET (0x34 + XIIC_REG_OFFSET) /* TSUDAT Register */
#define XIIC_TBUF_REG_OFFSET   (0x38 + XIIC_REG_OFFSET) /* TBUF Register */
#define XIIC_THIGH_REG_OFFSET  (0x3C + XIIC_REG_OFFSET) /* THIGH Register */
#define XIIC_TLOW_REG_OFFSET   (0x40 + XIIC_REG_OFFSET) /* TLOW Register */
#define XIIC_THDDAT_REG_OFFSET (0x44 + XIIC_REG_OFFSET) /* THDDAT Register */

/* Control Register masks */
#define XIIC_CR_ENABLE_DEVICE_MASK        0x01	/* Device enable = 1      */
#define XIIC_CR_TX_FIFO_RESET_MASK        0x02	/* Transmit FIFO reset=1  */
#define XIIC_CR_MSMS_MASK                 0x04	/* Master starts Txing=1  */
#define XIIC_CR_DIR_IS_TX_MASK            0x08	/* Dir of tx. Txing=1     */
#define XIIC_CR_NO_ACK_MASK               0x10	/* Tx Ack. NO ack = 1     */

Annotation

Implementation Notes