drivers/i3c/master.c
Source file repositories/reference/linux-study-clean/drivers/i3c/master.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/i3c/master.c- Extension
.c- Size
- 94913 bytes
- Lines
- 3612
- Domain
- Driver Families
- Bucket
- drivers/i3c
- Inferred role
- Driver Families: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/atomic.hlinux/bitmap.hlinux/bug.hlinux/delay.hlinux/device.hlinux/dma-mapping.hlinux/err.hlinux/export.hlinux/kernel.hlinux/list.hlinux/of.hlinux/pm_runtime.hlinux/slab.hlinux/spinlock.hlinux/workqueue.hinternals.h
Detected Declarations
struct i3c_generic_ibi_slotstruct i3c_generic_ibi_poolfunction i3c_bus_maintenance_lockfunction i3c_bus_maintenance_lockfunction operationfunction i3c_bus_normaluse_lockfunction i3c_bus_to_i3c_masterfunction i3c_master_rpm_getfunction i3c_master_rpm_putfunction i3c_bus_rpm_getfunction i3c_bus_rpm_putfunction i3c_bus_rpm_ibi_allowedfunction bcr_showfunction dcr_showfunction pid_showfunction dynamic_address_showfunction hdrcap_showfunction modalias_showfunction i3c_device_ueventfunction i3c_device_matchfunction i3c_device_probefunction i3c_device_removefunction i3c_bus_get_addr_slot_status_maskfunction i3c_bus_get_addr_slot_statusfunction i3c_bus_set_addr_slot_status_maskfunction i3c_bus_set_addr_slot_statusfunction i3c_bus_dev_addr_is_availfunction controllersfunction i3c_bus_init_addrslotsfunction i3c_bus_cleanupfunction i3c_bus_initfunction i3c_for_each_bus_lockedfunction i3c_register_notifierfunction i3c_unregister_notifierfunction i3c_bus_notifyfunction mode_showfunction current_master_showfunction i3c_scl_frequency_showfunction i2c_scl_frequency_showfunction i3c_master_hj_work_fnfunction i3c_set_hotjoinfunction hotjoin_storefunction i3c_master_enable_hotjoinfunction i3c_master_disable_hotjoinfunction i3c_master_queue_hotjoinfunction hotjoin_showfunction dev_nack_retry_count_showfunction dev_nack_retry_count_store
Annotated Snippet
static int i3c_device_match(struct device *dev, const struct device_driver *drv)
{
struct i3c_device *i3cdev;
const struct i3c_driver *i3cdrv;
if (dev->type != &i3c_device_type)
return 0;
i3cdev = dev_to_i3cdev(dev);
i3cdrv = drv_to_i3cdrv(drv);
if (i3c_device_match_id(i3cdev, i3cdrv->id_table))
return 1;
return 0;
}
static int i3c_device_probe(struct device *dev)
{
struct i3c_device *i3cdev = dev_to_i3cdev(dev);
struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
return driver->probe(i3cdev);
}
static void i3c_device_remove(struct device *dev)
{
struct i3c_device *i3cdev = dev_to_i3cdev(dev);
struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
if (driver->remove)
driver->remove(i3cdev);
}
static enum i3c_addr_slot_status
i3c_bus_get_addr_slot_status_mask(struct i3c_bus *bus, u16 addr, u32 mask)
{
unsigned long status;
int bitpos = addr * I3C_ADDR_SLOT_STATUS_BITS;
if (addr > I2C_MAX_ADDR)
return I3C_ADDR_SLOT_RSVD;
status = bus->addrslots[bitpos / BITS_PER_LONG];
status >>= bitpos % BITS_PER_LONG;
return status & mask;
}
static enum i3c_addr_slot_status
i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr)
{
return i3c_bus_get_addr_slot_status_mask(bus, addr, I3C_ADDR_SLOT_STATUS_MASK);
}
static void i3c_bus_set_addr_slot_status_mask(struct i3c_bus *bus, u16 addr,
enum i3c_addr_slot_status status, u32 mask)
{
int bitpos = addr * I3C_ADDR_SLOT_STATUS_BITS;
unsigned long *ptr;
if (addr > I2C_MAX_ADDR)
return;
ptr = bus->addrslots + (bitpos / BITS_PER_LONG);
*ptr &= ~((unsigned long)mask << (bitpos % BITS_PER_LONG));
*ptr |= ((unsigned long)status & mask) << (bitpos % BITS_PER_LONG);
}
static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr,
enum i3c_addr_slot_status status)
{
i3c_bus_set_addr_slot_status_mask(bus, addr, status, I3C_ADDR_SLOT_STATUS_MASK);
}
static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr)
{
enum i3c_addr_slot_status status;
status = i3c_bus_get_addr_slot_status(bus, addr);
return status == I3C_ADDR_SLOT_FREE;
}
/*
* ┌────┬─────────────┬───┬─────────┬───┐
* │S/Sr│ 7'h7E RnW=0 │ACK│ ENTDAA │ T ├────┐
* └────┴─────────────┴───┴─────────┴───┘ │
* ┌─────────────────────────────────────────┘
* │ ┌──┬─────────────┬───┬─────────────────┬────────────────┬───┬─────────┐
* └─►│Sr│7'h7E RnW=1 │ACK│48bit UID BCR DCR│Assign 7bit Addr│PAR│ ACK/NACK│
Annotation
- Immediate include surface: `linux/atomic.h`, `linux/bitmap.h`, `linux/bug.h`, `linux/delay.h`, `linux/device.h`, `linux/dma-mapping.h`, `linux/err.h`, `linux/export.h`.
- Detected declarations: `struct i3c_generic_ibi_slot`, `struct i3c_generic_ibi_pool`, `function i3c_bus_maintenance_lock`, `function i3c_bus_maintenance_lock`, `function operation`, `function i3c_bus_normaluse_lock`, `function i3c_bus_to_i3c_master`, `function i3c_master_rpm_get`, `function i3c_master_rpm_put`, `function i3c_bus_rpm_get`.
- Atlas domain: Driver Families / drivers/i3c.
- Implementation status: pattern implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.