drivers/i3c/master/dw-i3c-master.c
Source file repositories/reference/linux-study-clean/drivers/i3c/master/dw-i3c-master.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/i3c/master/dw-i3c-master.c- Extension
.c- Size
- 51880 bytes
- Lines
- 1857
- Domain
- Driver Families
- Bucket
- drivers/i3c
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/bitops.hlinux/cleanup.hlinux/clk.hlinux/completion.hlinux/err.hlinux/errno.hlinux/i3c/master.hlinux/interrupt.hlinux/ioport.hlinux/iopoll.hlinux/list.hlinux/module.hlinux/of.hlinux/pinctrl/consumer.hlinux/platform_device.hlinux/pm_runtime.hlinux/reset.hlinux/slab.h../internals.hdw-i3c-master.h
Detected Declarations
struct dw_i3c_cmdstruct dw_i3c_xferstruct dw_i3c_i2c_dev_datastruct dw_i3c_drvdatafunction get_ibi_sir_bit_indexfunction dw_i3c_master_supports_ccc_cmdfunction to_dw_i3c_masterfunction dw_i3c_master_disablefunction dw_i3c_master_enablefunction dw_i3c_master_get_addr_posfunction dw_i3c_master_get_free_posfunction dw_i3c_master_wr_tx_fifofunction dw_i3c_master_read_rx_fifofunction dw_i3c_master_read_ibi_fifofunction dw_i3c_master_alloc_xferfunction dw_i3c_master_start_xfer_lockedfunction dw_i3c_master_enqueue_xferfunction dw_i3c_master_dequeue_xfer_lockedfunction dw_i3c_master_dequeue_xferfunction dw_i3c_master_end_xfer_lockedfunction dw_i3c_master_set_intr_regsfunction dw_i3c_clk_cfgfunction dw_i2c_clk_cfgfunction dw_i3c_master_bus_initfunction dw_i3c_master_bus_cleanupfunction dw_i3c_ccc_setfunction dw_i3c_ccc_getfunction amd_configure_od_pp_quirkfunction dw_i3c_master_send_ccc_cmdfunction dw_i3c_master_daafunction dw_i3c_master_i3c_xfersfunction dw_i3c_master_reattach_i3c_devfunction dw_i3c_master_attach_i3c_devfunction dw_i3c_master_detach_i3c_devfunction dw_i3c_master_i2c_xfersfunction dw_i3c_master_attach_i2c_devfunction dw_i3c_master_detach_i2c_devfunction dw_i3c_master_request_ibifunction dw_i3c_master_free_ibifunction scoped_guardfunction dw_i3c_master_enable_sir_signalfunction dw_i3c_master_set_sir_enabledfunction dw_i3c_master_enable_hotjoinfunction dw_i3c_master_disable_hotjoinfunction dw_i3c_master_enable_ibifunction dw_i3c_master_disable_ibifunction dw_i3c_master_recycle_ibi_slotfunction dw_i3c_master_drain_ibi_queue
Annotated Snippet
struct dw_i3c_cmd {
u32 cmd_lo;
u32 cmd_hi;
u16 tx_len;
const void *tx_buf;
u16 rx_len;
void *rx_buf;
u8 error;
};
struct dw_i3c_xfer {
struct list_head node;
struct completion comp;
int ret;
unsigned int ncmds;
struct dw_i3c_cmd cmds[] __counted_by(ncmds);
};
struct dw_i3c_i2c_dev_data {
u8 index;
struct i3c_generic_ibi_pool *ibi_pool;
};
struct dw_i3c_drvdata {
u32 flags;
};
static inline u32 get_ibi_sir_bit_index(u8 addr)
{
u32 lo = FIELD_GET(DYN_ADDR_LO_MASK, addr);
u32 hi = FIELD_GET(DYN_ADDR_HI_MASK, addr);
return (lo + hi) % IBI_SIR_BIT_MOD;
}
static bool dw_i3c_master_supports_ccc_cmd(struct i3c_master_controller *m,
const struct i3c_ccc_cmd *cmd)
{
if (cmd->ndests > 1)
return false;
switch (cmd->id) {
case I3C_CCC_ENEC(true):
case I3C_CCC_ENEC(false):
case I3C_CCC_DISEC(true):
case I3C_CCC_DISEC(false):
case I3C_CCC_ENTAS(0, true):
case I3C_CCC_ENTAS(0, false):
case I3C_CCC_RSTDAA(true):
case I3C_CCC_RSTDAA(false):
case I3C_CCC_ENTDAA:
case I3C_CCC_SETMWL(true):
case I3C_CCC_SETMWL(false):
case I3C_CCC_SETMRL(true):
case I3C_CCC_SETMRL(false):
case I3C_CCC_ENTHDR(0):
case I3C_CCC_SETDASA:
case I3C_CCC_SETNEWDA:
case I3C_CCC_GETMWL:
case I3C_CCC_GETMRL:
case I3C_CCC_GETPID:
case I3C_CCC_GETBCR:
case I3C_CCC_GETDCR:
case I3C_CCC_GETSTATUS:
case I3C_CCC_GETMXDS:
case I3C_CCC_GETHDRCAP:
return true;
default:
return false;
}
}
static inline struct dw_i3c_master *
to_dw_i3c_master(struct i3c_master_controller *master)
{
return container_of(master, struct dw_i3c_master, base);
}
static void dw_i3c_master_disable(struct dw_i3c_master *master)
{
writel(readl(master->regs + DEVICE_CTRL) & ~DEV_CTRL_ENABLE,
master->regs + DEVICE_CTRL);
}
static void dw_i3c_master_enable(struct dw_i3c_master *master)
{
u32 dev_ctrl;
dev_ctrl = readl(master->regs + DEVICE_CTRL);
/* For now don't support Hot-Join */
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/bitops.h`, `linux/cleanup.h`, `linux/clk.h`, `linux/completion.h`, `linux/err.h`, `linux/errno.h`, `linux/i3c/master.h`.
- Detected declarations: `struct dw_i3c_cmd`, `struct dw_i3c_xfer`, `struct dw_i3c_i2c_dev_data`, `struct dw_i3c_drvdata`, `function get_ibi_sir_bit_index`, `function dw_i3c_master_supports_ccc_cmd`, `function to_dw_i3c_master`, `function dw_i3c_master_disable`, `function dw_i3c_master_enable`, `function dw_i3c_master_get_addr_pos`.
- Atlas domain: Driver Families / drivers/i3c.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.