drivers/i3c/master/dw-i3c-master.h
Source file repositories/reference/linux-study-clean/drivers/i3c/master/dw-i3c-master.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/i3c/master/dw-i3c-master.h- Extension
.h- Size
- 2536 bytes
- Lines
- 97
- Domain
- Driver Families
- Bucket
- drivers/i3c
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk.hlinux/i3c/master.hlinux/reset.hlinux/types.h
Detected Declarations
struct dw_i3c_master_capsstruct dw_i3c_dat_entrystruct dw_i3c_masterstruct dw_i3c_platform_ops
Annotated Snippet
struct dw_i3c_master_caps {
u8 cmdfifodepth;
u8 datafifodepth;
};
struct dw_i3c_dat_entry {
u8 addr;
bool is_i2c_addr;
struct i3c_dev_desc *ibi_dev;
};
struct dw_i3c_master {
struct i3c_master_controller base;
struct device *dev;
u16 maxdevs;
u16 datstartaddr;
u32 free_pos;
struct {
struct list_head list;
struct dw_i3c_xfer *cur;
spinlock_t lock;
} xferqueue;
struct dw_i3c_master_caps caps;
void __iomem *regs;
struct reset_control *core_rst;
struct clk *core_clk;
struct clk *pclk;
char version[5];
char type[5];
u32 sir_rej_mask;
bool i2c_slv_prsnt;
u32 dev_addr;
u32 i3c_pp_timing;
u32 i3c_od_timing;
u32 ext_lcnt_timing;
u32 bus_free_timing;
u32 i2c_fm_timing;
u32 i2c_fmp_timing;
u32 quirks;
bool has_ibi_data;
/*
* Per-device hardware data, used to manage the device address table
* (DAT)
*
* Locking: the devs array may be referenced in IRQ context while
* processing an IBI. However, IBIs (for a specific device, which
* implies a specific DAT entry) can only happen while interrupts are
* requested for that device, which is serialised against other
* insertions/removals from the array by the global i3c infrastructure.
* So, devs_lock protects against concurrent updates to devs->ibi_dev
* between request_ibi/free_ibi and the IBI irq event.
*/
struct dw_i3c_dat_entry devs[DW_I3C_MAX_DEVS];
spinlock_t devs_lock;
/* platform-specific data */
const struct dw_i3c_platform_ops *platform_ops;
};
struct dw_i3c_platform_ops {
/*
* Called on early bus init: the i3c has been set up, but before any
* transactions have taken place. Platform implementations may use to
* perform actual device enabling with the i3c core ready.
*/
int (*init)(struct dw_i3c_master *i3c);
/*
* Initialise a DAT entry to enable/disable IBIs. Allows the platform
* to perform any device workarounds on the DAT entry before
* inserting into the hardware table.
*
* Called with the DAT lock held; must not sleep.
*/
void (*set_dat_ibi)(struct dw_i3c_master *i3c,
struct i3c_dev_desc *dev, bool enable, u32 *reg);
};
extern int dw_i3c_common_probe(struct dw_i3c_master *master,
struct platform_device *pdev);
extern void dw_i3c_common_remove(struct dw_i3c_master *master);
Annotation
- Immediate include surface: `linux/clk.h`, `linux/i3c/master.h`, `linux/reset.h`, `linux/types.h`.
- Detected declarations: `struct dw_i3c_master_caps`, `struct dw_i3c_dat_entry`, `struct dw_i3c_master`, `struct dw_i3c_platform_ops`.
- Atlas domain: Driver Families / drivers/i3c.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.