drivers/i3c/master/svc-i3c-master.c
Source file repositories/reference/linux-study-clean/drivers/i3c/master/svc-i3c-master.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/i3c/master/svc-i3c-master.c- Extension
.c- Size
- 62843 bytes
- Lines
- 2176
- Domain
- Driver Families
- Bucket
- drivers/i3c
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/clk.hlinux/completion.hlinux/errno.hlinux/i3c/master.hlinux/interrupt.hlinux/iopoll.hlinux/list.hlinux/module.hlinux/of.hlinux/pinctrl/consumer.hlinux/platform_device.hlinux/pm_runtime.h
Detected Declarations
struct svc_i3c_cmdstruct svc_i3c_xferstruct svc_i3c_regs_savestruct svc_i3c_drvdatastruct svc_i3c_masterstruct svc_i3c_i2c_dev_datafunction svc_has_quirkfunction svc_has_daa_corruptfunction is_events_enabledfunction svc_i3c_master_errorfunction svc_i3c_master_enable_interruptsfunction svc_i3c_master_disable_interruptsfunction svc_i3c_master_clear_merrwarnfunction svc_i3c_master_flush_fifofunction svc_i3c_master_reset_fifo_triggerfunction svc_i3c_master_resetfunction to_svc_i3c_masterfunction svc_i3c_master_dev_from_addrfunction svc_cmd_is_readfunction svc_i3c_master_emit_force_exitfunction svc_i3c_master_emit_stopfunction svc_i3c_master_handle_ibifunction svc_i3c_master_ack_ibifunction svc_i3c_master_nack_ibifunction svc_i3c_master_handle_ibi_wonfunction svc_i3c_master_ibi_isrfunction svc_i3c_master_irq_handlerfunction svc_i3c_master_set_speedfunction svc_i3c_master_bus_initfunction svc_i3c_master_bus_cleanupfunction svc_i3c_master_reserve_slotfunction svc_i3c_master_release_slotfunction svc_i3c_master_attach_i3c_devfunction svc_i3c_master_reattach_i3c_devfunction svc_i3c_master_detach_i3c_devfunction svc_i3c_master_attach_i2c_devfunction svc_i3c_master_detach_i2c_devfunction svc_i3c_master_readbfunction svc_i3c_master_do_daa_lockedfunction svc_i3c_update_ibirulesfunction svc_i3c_master_do_daafunction svc_i3c_master_readfunction svc_i3c_master_writefunction svc_i3c_master_xferfunction Requestfunction svc_i3c_master_alloc_xferfunction svc_i3c_master_free_xferfunction svc_i3c_master_dequeue_xfer_locked
Annotated Snippet
struct svc_i3c_cmd {
u8 addr;
union {
bool rnw;
u8 cmd;
u32 rnw_cmd;
};
u8 *in;
const void *out;
unsigned int len;
unsigned int actual_len;
struct i3c_xfer *xfer;
bool continued;
};
struct svc_i3c_xfer {
struct list_head node;
struct completion comp;
int ret;
unsigned int type;
unsigned int ncmds;
struct svc_i3c_cmd cmds[] __counted_by(ncmds);
};
struct svc_i3c_regs_save {
u32 mconfig;
u32 mdynaddr;
};
struct svc_i3c_drvdata {
u32 quirks;
};
/**
* struct svc_i3c_master - Silvaco I3C Master structure
* @base: I3C master controller
* @dev: Corresponding device
* @regs: Memory mapping
* @saved_regs: Volatile values for PM operations
* @free_slots: Bit array of available slots
* @addrs: Array containing the dynamic addresses of each attached device
* @descs: Array of descriptors, one per attached device
* @irq: Main interrupt
* @num_clks: I3C clock number
* @fclk: Fast clock (bus)
* @clks: I3C clock array
* @xferqueue: Transfer queue structure
* @xferqueue.list: List member
* @xferqueue.cur: Current ongoing transfer
* @xferqueue.lock: Queue lock
* @ibi: IBI structure
* @ibi.num_slots: Number of slots available in @ibi.slots
* @ibi.slots: Available IBI slots
* @ibi.tbq_slot: To be queued IBI slot
* @ibi.lock: IBI lock
* @lock: Transfer lock, protect between IBI work thread and callbacks from master
* @drvdata: Driver data
* @enabled_events: Bit masks for enable events (IBI, HotJoin).
* @mctrl_config: Configuration value in SVC_I3C_MCTRL for setting speed back.
*/
struct svc_i3c_master {
struct i3c_master_controller base;
struct device *dev;
void __iomem *regs;
struct svc_i3c_regs_save saved_regs;
u32 free_slots;
u8 addrs[SVC_I3C_MAX_DEVS];
struct i3c_dev_desc *descs[SVC_I3C_MAX_DEVS];
int irq;
int num_clks;
struct clk *fclk;
struct clk_bulk_data *clks;
struct {
struct list_head list;
struct svc_i3c_xfer *cur;
/* Prevent races between transfers */
spinlock_t lock;
} xferqueue;
struct {
unsigned int num_slots;
struct i3c_dev_desc **slots;
struct i3c_ibi_slot *tbq_slot;
/* Prevent races within IBI handlers */
spinlock_t lock;
} ibi;
struct mutex lock;
const struct svc_i3c_drvdata *drvdata;
u32 enabled_events;
u32 mctrl_config;
};
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/clk.h`, `linux/completion.h`, `linux/errno.h`, `linux/i3c/master.h`, `linux/interrupt.h`, `linux/iopoll.h`, `linux/list.h`.
- Detected declarations: `struct svc_i3c_cmd`, `struct svc_i3c_xfer`, `struct svc_i3c_regs_save`, `struct svc_i3c_drvdata`, `struct svc_i3c_master`, `struct svc_i3c_i2c_dev_data`, `function svc_has_quirk`, `function svc_has_daa_corrupt`, `function is_events_enabled`, `function svc_i3c_master_error`.
- Atlas domain: Driver Families / drivers/i3c.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.