drivers/iio/accel/adxl313_spi.c
Source file repositories/reference/linux-study-clean/drivers/iio/accel/adxl313_spi.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/iio/accel/adxl313_spi.c- Extension
.c- Size
- 3563 bytes
- Lines
- 129
- Domain
- Driver Families
- Bucket
- drivers/iio
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/mod_devicetable.hlinux/module.hlinux/regmap.hlinux/spi/spi.hlinux/property.hadxl313.h
Detected Declarations
function adxl313_spi_setupfunction adxl313_spi_probe
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* ADXL313 3-Axis Digital Accelerometer
*
* Copyright (c) 2021 Lucas Stankus <lucas.p.stankus@gmail.com>
*
* Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/ADXL313.pdf
*/
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include <linux/property.h>
#include "adxl313.h"
static const struct regmap_config adxl31x_spi_regmap_config[] = {
[ADXL312] = {
.reg_bits = 8,
.val_bits = 8,
.rd_table = &adxl312_readable_regs_table,
.wr_table = &adxl312_writable_regs_table,
.max_register = 0x39,
/* Setting bits 7 and 6 enables multiple-byte read */
.read_flag_mask = BIT(7) | BIT(6),
.volatile_reg = adxl313_is_volatile_reg,
.cache_type = REGCACHE_MAPLE,
},
[ADXL313] = {
.reg_bits = 8,
.val_bits = 8,
.rd_table = &adxl313_readable_regs_table,
.wr_table = &adxl313_writable_regs_table,
.max_register = 0x39,
/* Setting bits 7 and 6 enables multiple-byte read */
.read_flag_mask = BIT(7) | BIT(6),
.volatile_reg = adxl313_is_volatile_reg,
.cache_type = REGCACHE_MAPLE,
},
[ADXL314] = {
.reg_bits = 8,
.val_bits = 8,
.rd_table = &adxl314_readable_regs_table,
.wr_table = &adxl314_writable_regs_table,
.max_register = 0x39,
/* Setting bits 7 and 6 enables multiple-byte read */
.read_flag_mask = BIT(7) | BIT(6),
.volatile_reg = adxl313_is_volatile_reg,
.cache_type = REGCACHE_MAPLE,
},
};
static int adxl313_spi_setup(struct device *dev, struct regmap *regmap)
{
struct spi_device *spi = container_of(dev, struct spi_device, dev);
int ret;
if (spi->mode & SPI_3WIRE) {
ret = regmap_write(regmap, ADXL313_REG_DATA_FORMAT,
ADXL313_SPI_3WIRE);
if (ret)
return ret;
}
return regmap_update_bits(regmap, ADXL313_REG_POWER_CTL,
ADXL313_I2C_DISABLE, ADXL313_I2C_DISABLE);
}
static int adxl313_spi_probe(struct spi_device *spi)
{
const struct adxl313_chip_info *chip_data;
struct regmap *regmap;
int ret;
spi->mode |= SPI_MODE_3;
ret = spi_setup(spi);
if (ret)
return ret;
chip_data = spi_get_device_match_data(spi);
regmap = devm_regmap_init_spi(spi,
&adxl31x_spi_regmap_config[chip_data->type]);
if (IS_ERR(regmap)) {
dev_err(&spi->dev, "Error initializing spi regmap: %ld\n",
PTR_ERR(regmap));
return PTR_ERR(regmap);
}
Annotation
- Immediate include surface: `linux/mod_devicetable.h`, `linux/module.h`, `linux/regmap.h`, `linux/spi/spi.h`, `linux/property.h`, `adxl313.h`.
- Detected declarations: `function adxl313_spi_setup`, `function adxl313_spi_probe`.
- Atlas domain: Driver Families / drivers/iio.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.