drivers/iio/accel/adxl345_core.c

Source file repositories/reference/linux-study-clean/drivers/iio/accel/adxl345_core.c

File Facts

System
Linux kernel
Corpus path
drivers/iio/accel/adxl345_core.c
Extension
.c
Size
54266 bytes
Lines
2043
Domain
Driver Families
Bucket
drivers/iio
Inferred role
Driver Families: exported/initcall integration point
Status
integration implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct adxl345_state {
	const struct adxl345_chip_info *info;
	struct regmap *regmap;
	bool fifo_delay; /* delay: delay is needed for SPI */
	u8 watermark;
	u8 fifo_mode;

	u8 inact_threshold;
	u32 inact_time_ms;

	u32 tap_duration_us;
	u32 tap_latent_us;
	u32 tap_window_us;

	__le16 fifo_buf[ADXL345_DIRS * ADXL345_FIFO_SIZE + 1] __aligned(IIO_DMA_MINALIGN);
};

static const struct iio_event_spec adxl345_events[] = {
	{
		/* activity */
		.type = IIO_EV_TYPE_MAG,
		.dir = IIO_EV_DIR_RISING,
		.mask_shared_by_type =
			BIT(IIO_EV_INFO_ENABLE) |
			BIT(IIO_EV_INFO_SCALE) |
			BIT(IIO_EV_INFO_VALUE),
	},
	{
		/* activity, ac bit set */
		.type = IIO_EV_TYPE_MAG_ADAPTIVE,
		.dir = IIO_EV_DIR_RISING,
		.mask_shared_by_type =
			BIT(IIO_EV_INFO_ENABLE) |
			BIT(IIO_EV_INFO_SCALE) |
			BIT(IIO_EV_INFO_VALUE),
	},
	{
		/* single tap */
		.type = IIO_EV_TYPE_GESTURE,
		.dir = IIO_EV_DIR_SINGLETAP,
		.mask_separate = BIT(IIO_EV_INFO_ENABLE),
		.mask_shared_by_type =
			BIT(IIO_EV_INFO_SCALE) |
			BIT(IIO_EV_INFO_VALUE) |
			BIT(IIO_EV_INFO_TIMEOUT),
	},
	{
		/* double tap */
		.type = IIO_EV_TYPE_GESTURE,
		.dir = IIO_EV_DIR_DOUBLETAP,
		.mask_shared_by_type =
			BIT(IIO_EV_INFO_ENABLE) |
			BIT(IIO_EV_INFO_SCALE) |
			BIT(IIO_EV_INFO_VALUE) |
			BIT(IIO_EV_INFO_RESET_TIMEOUT) |
			BIT(IIO_EV_INFO_TAP2_MIN_DELAY),
	},
};

#define ADXL345_CHANNEL(index, reg, axis) {					\
	.type = IIO_ACCEL,						\
	.modified = 1,							\
	.channel2 = IIO_MOD_##axis,					\
	.address = (reg),						\
	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |			\
		BIT(IIO_CHAN_INFO_CALIBBIAS),				\
	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |		\
		BIT(IIO_CHAN_INFO_SAMP_FREQ),				\
	.info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SCALE) | \
		BIT(IIO_CHAN_INFO_SAMP_FREQ),		\
	.scan_index = (index),				\
	.scan_type = {					\
		.sign = 's',				\
		.realbits = 13,				\
		.storagebits = 16,			\
		.endianness = IIO_LE,			\
	},						\
	.event_spec = adxl345_events,			\
	.num_event_specs = ARRAY_SIZE(adxl345_events),	\
}

enum adxl345_chans {
	chan_x, chan_y, chan_z,
};

static const struct iio_event_spec adxl345_fake_chan_events[] = {
	{
		/* inactivity */
		.type = IIO_EV_TYPE_MAG,
		.dir = IIO_EV_DIR_FALLING,

Annotation

Implementation Notes