drivers/iio/accel/adxl367_spi.c

Source file repositories/reference/linux-study-clean/drivers/iio/accel/adxl367_spi.c

File Facts

System
Linux kernel
Corpus path
drivers/iio/accel/adxl367_spi.c
Extension
.c
Size
4379 bytes
Lines
167
Domain
Driver Families
Bucket
drivers/iio
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct adxl367_spi_state {
	struct spi_device	*spi;

	struct spi_message	reg_write_msg;
	struct spi_transfer	reg_write_xfer[2];

	struct spi_message	reg_read_msg;
	struct spi_transfer	reg_read_xfer[2];

	struct spi_message	fifo_msg;
	struct spi_transfer	fifo_xfer[2];

	/*
	 * DMA (thus cache coherency maintenance) may require the
	 * transfer buffers live in their own cache lines.
	 */
	u8			reg_write_tx_buf[1] __aligned(IIO_DMA_MINALIGN);
	u8			reg_read_tx_buf[2];
	u8			fifo_tx_buf[1];
};

static int adxl367_read_fifo(void *context, __be16 *fifo_buf,
			     unsigned int fifo_entries)
{
	struct adxl367_spi_state *st = context;

	st->fifo_xfer[1].rx_buf = fifo_buf;
	st->fifo_xfer[1].len = fifo_entries * sizeof(*fifo_buf);

	return spi_sync(st->spi, &st->fifo_msg);
}

static int adxl367_read(void *context, const void *reg_buf, size_t reg_size,
			void *val_buf, size_t val_size)
{
	struct adxl367_spi_state *st = context;
	u8 reg = ((const u8 *)reg_buf)[0];

	st->reg_read_tx_buf[1] = reg;
	st->reg_read_xfer[1].rx_buf = val_buf;
	st->reg_read_xfer[1].len = val_size;

	return spi_sync(st->spi, &st->reg_read_msg);
}

static int adxl367_write(void *context, const void *val_buf, size_t val_size)
{
	struct adxl367_spi_state *st = context;

	st->reg_write_xfer[1].tx_buf = val_buf;
	st->reg_write_xfer[1].len = val_size;

	return spi_sync(st->spi, &st->reg_write_msg);
}

static const struct regmap_bus adxl367_spi_regmap_bus = {
	.read = adxl367_read,
	.write = adxl367_write,
};

static const struct regmap_config adxl367_spi_regmap_config = {
	.reg_bits = 8,
	.val_bits = 8,
};

static const struct adxl367_ops adxl367_spi_ops = {
	.read_fifo = adxl367_read_fifo,
};

static int adxl367_spi_probe(struct spi_device *spi)
{
	struct adxl367_spi_state *st;
	struct regmap *regmap;

	st = devm_kzalloc(&spi->dev, sizeof(*st), GFP_KERNEL);
	if (!st)
		return -ENOMEM;

	st->spi = spi;

	/*
	 * Xfer:   [XFR1] [           XFR2           ]
	 * Master:  0x0A   ADDR DATA0 DATA1 ... DATAN
	 * Slave:   ....   ..........................
	 */
	st->reg_write_tx_buf[0] = ADXL367_SPI_WRITE_COMMAND;
	st->reg_write_xfer[0].tx_buf = st->reg_write_tx_buf;
	st->reg_write_xfer[0].len = sizeof(st->reg_write_tx_buf);
	spi_message_init_with_transfers(&st->reg_write_msg,
					st->reg_write_xfer, 2);

Annotation

Implementation Notes