drivers/iio/accel/bmc150-accel-core.c
Source file repositories/reference/linux-study-clean/drivers/iio/accel/bmc150-accel-core.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/iio/accel/bmc150-accel-core.c- Extension
.c- Size
- 49352 bytes
- Lines
- 1865
- Domain
- Driver Families
- Bucket
- drivers/iio
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/module.hlinux/i2c.hlinux/interrupt.hlinux/delay.hlinux/slab.hlinux/acpi.hlinux/pm.hlinux/pm_runtime.hlinux/property.hlinux/iio/iio.hlinux/iio/sysfs.hlinux/iio/buffer.hlinux/iio/events.hlinux/iio/trigger.hlinux/iio/trigger_consumer.hlinux/iio/triggered_buffer.hlinux/regmap.hlinux/regulator/consumer.hbmc150-accel.h
Detected Declarations
struct bmc150_scale_infostruct bmc150_accel_chip_infostruct bmc150_accel_interrupt_infoenum bmc150_accel_axisenum bmc150_power_modesfunction bmc150_accel_set_modefunction bmc150_accel_set_bwfunction bmc150_accel_update_slopefunction bmc150_accel_any_motion_setupfunction bmc150_accel_get_bwfunction bmc150_accel_get_startup_timesfunction bmc150_accel_set_power_statefunction bmc150_accel_set_power_statefunction Profunction bmc150_apply_dual250e_acpi_orientationfunction bmc150_apply_acpi_orientationfunction bmc150_apply_acpi_orientationfunction bmc150_accel_interrupts_setupfunction bmc150_accel_set_interruptfunction bmc150_accel_set_scalefunction bmc150_accel_get_tempfunction bmc150_accel_get_axisfunction bmc150_accel_read_rawfunction bmc150_accel_write_rawfunction bmc150_accel_read_eventfunction bmc150_accel_write_eventfunction bmc150_accel_read_event_configfunction bmc150_accel_write_event_configfunction bmc150_accel_validate_triggerfunction bmc150_accel_get_fifo_watermarkfunction bmc150_accel_get_fifo_statefunction bmc150_accel_get_mount_matrixfunction bmc150_accel_set_watermarkfunction bmc150_accel_fifo_transferfunction __bmc150_accel_fifo_flushfunction bmc150_accel_fifo_flushfunction BITfunction bmc150_accel_trigger_handlerfunction bmc150_accel_trig_reenfunction bmc150_accel_trigger_set_statefunction bmc150_accel_handle_roc_eventfunction bmc150_accel_irq_thread_handlerfunction bmc150_accel_irq_handlerfunction bmc150_accel_unregister_triggersfunction bmc150_accel_triggers_setupfunction bmc150_accel_fifo_set_modefunction bmc150_accel_buffer_preenablefunction bmc150_accel_buffer_postenable
Annotated Snippet
struct bmc150_scale_info {
int scale;
u8 reg_range;
};
struct bmc150_accel_chip_info {
const char *name;
u8 chip_id;
const struct iio_chan_spec *channels;
int num_channels;
const struct bmc150_scale_info scale_table[4];
};
static const struct {
int val;
int val2;
u8 bw_bits;
} bmc150_accel_samp_freq_table[] = { {15, 620000, 0x08},
{31, 260000, 0x09},
{62, 500000, 0x0A},
{125, 0, 0x0B},
{250, 0, 0x0C},
{500, 0, 0x0D},
{1000, 0, 0x0E},
{2000, 0, 0x0F} };
static __maybe_unused const struct {
int bw_bits;
int msec;
} bmc150_accel_sample_upd_time[] = { {0x08, 64},
{0x09, 32},
{0x0A, 16},
{0x0B, 8},
{0x0C, 4},
{0x0D, 2},
{0x0E, 1},
{0x0F, 1} };
static const struct {
int sleep_dur;
u8 reg_value;
} bmc150_accel_sleep_value_table[] = { {0, 0},
{500, BMC150_ACCEL_SLEEP_500_MICRO},
{1000, BMC150_ACCEL_SLEEP_1_MS},
{2000, BMC150_ACCEL_SLEEP_2_MS},
{4000, BMC150_ACCEL_SLEEP_4_MS},
{6000, BMC150_ACCEL_SLEEP_6_MS},
{10000, BMC150_ACCEL_SLEEP_10_MS},
{25000, BMC150_ACCEL_SLEEP_25_MS},
{50000, BMC150_ACCEL_SLEEP_50_MS},
{100000, BMC150_ACCEL_SLEEP_100_MS},
{500000, BMC150_ACCEL_SLEEP_500_MS},
{1000000, BMC150_ACCEL_SLEEP_1_SEC} };
const struct regmap_config bmc150_regmap_conf = {
.reg_bits = 8,
.val_bits = 8,
.max_register = 0x3f,
};
EXPORT_SYMBOL_NS_GPL(bmc150_regmap_conf, "IIO_BMC150");
static int bmc150_accel_set_mode(struct bmc150_accel_data *data,
enum bmc150_power_modes mode,
int dur_us)
{
struct device *dev = regmap_get_device(data->regmap);
int i;
int ret;
u8 lpw_bits;
int dur_val = -1;
if (dur_us > 0) {
for (i = 0; i < ARRAY_SIZE(bmc150_accel_sleep_value_table);
++i) {
if (bmc150_accel_sleep_value_table[i].sleep_dur ==
dur_us)
dur_val =
bmc150_accel_sleep_value_table[i].reg_value;
}
} else {
dur_val = 0;
}
if (dur_val < 0)
return -EINVAL;
lpw_bits = mode << BMC150_ACCEL_PMU_MODE_SHIFT;
lpw_bits |= (dur_val << BMC150_ACCEL_PMU_BIT_SLEEP_DUR_SHIFT);
dev_dbg(dev, "Set Mode bits %x\n", lpw_bits);
Annotation
- Immediate include surface: `linux/module.h`, `linux/i2c.h`, `linux/interrupt.h`, `linux/delay.h`, `linux/slab.h`, `linux/acpi.h`, `linux/pm.h`, `linux/pm_runtime.h`.
- Detected declarations: `struct bmc150_scale_info`, `struct bmc150_accel_chip_info`, `struct bmc150_accel_interrupt_info`, `enum bmc150_accel_axis`, `enum bmc150_power_modes`, `function bmc150_accel_set_mode`, `function bmc150_accel_set_bw`, `function bmc150_accel_update_slope`, `function bmc150_accel_any_motion_setup`, `function bmc150_accel_get_bw`.
- Atlas domain: Driver Families / drivers/iio.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.