drivers/iio/accel/msa311.c

Source file repositories/reference/linux-study-clean/drivers/iio/accel/msa311.c

File Facts

System
Linux kernel
Corpus path
drivers/iio/accel/msa311.c
Extension
.c
Size
36300 bytes
Lines
1297
Domain
Driver Families
Bucket
drivers/iio
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct iio_decimal_fract {
	int integral;
	int microfract;
};

static const struct iio_decimal_fract msa311_fs_table[] = {
	{0, 9580}, {0, 19160}, {0, 38320}, {0, 76641},
};

/* Possible Output Data Rate values */
enum {
	MSA311_ODR_1_HZ,
	MSA311_ODR_1_95_HZ,
	MSA311_ODR_3_9_HZ,
	MSA311_ODR_7_81_HZ,
	MSA311_ODR_15_63_HZ,
	MSA311_ODR_31_25_HZ,
	MSA311_ODR_62_5_HZ,
	MSA311_ODR_125_HZ,
	MSA311_ODR_250_HZ,
	MSA311_ODR_500_HZ,
	MSA311_ODR_1000_HZ,
};

static const struct iio_decimal_fract msa311_odr_table[] = {
	{1, 0}, {1, 950000}, {3, 900000}, {7, 810000}, {15, 630000},
	{31, 250000}, {62, 500000}, {125, 0}, {250, 0}, {500, 0}, {1000, 0},
};

/* All supported power modes */
#define MSA311_PWR_MODE_NORMAL  0b00
#define MSA311_PWR_MODE_LOW     0b01
#define MSA311_PWR_MODE_UNKNOWN 0b10
#define MSA311_PWR_MODE_SUSPEND 0b11
static const char * const msa311_pwr_modes[] = {
	[MSA311_PWR_MODE_NORMAL] = "normal",
	[MSA311_PWR_MODE_LOW] = "low",
	[MSA311_PWR_MODE_UNKNOWN] = "unknown",
	[MSA311_PWR_MODE_SUSPEND] = "suspend",
};

/* Autosuspend delay */
#define MSA311_PWR_SLEEP_DELAY_MS 2000

/* Possible INT1 types and levels */
enum {
	MSA311_INT1_OD_PUSH_PULL,
	MSA311_INT1_OD_OPEN_DRAIN,
};

enum {
	MSA311_INT1_LVL_LOW,
	MSA311_INT1_LVL_HIGH,
};

/* Latch INT modes */
#define MSA311_LATCH_INT_NOT_LATCHED 0b0000
#define MSA311_LATCH_INT_250MS       0b0001
#define MSA311_LATCH_INT_500MS       0b0010
#define MSA311_LATCH_INT_1S          0b0011
#define MSA311_LATCH_INT_2S          0b0100
#define MSA311_LATCH_INT_4S          0b0101
#define MSA311_LATCH_INT_8S          0b0110
#define MSA311_LATCH_INT_1MS         0b1010
#define MSA311_LATCH_INT_2MS         0b1011
#define MSA311_LATCH_INT_25MS        0b1100
#define MSA311_LATCH_INT_50MS        0b1101
#define MSA311_LATCH_INT_100MS       0b1110
#define MSA311_LATCH_INT_LATCHED     0b0111

static const struct regmap_range msa311_readonly_registers[] = {
	regmap_reg_range(MSA311_PARTID_REG, MSA311_ORIENT_STS_REG),
};

static const struct regmap_access_table msa311_writeable_table = {
	.no_ranges = msa311_readonly_registers,
	.n_no_ranges = ARRAY_SIZE(msa311_readonly_registers),
};

static const struct regmap_range msa311_writeonly_registers[] = {
	regmap_reg_range(MSA311_SOFT_RESET_REG, MSA311_SOFT_RESET_REG),
};

static const struct regmap_access_table msa311_readable_table = {
	.no_ranges = msa311_writeonly_registers,
	.n_no_ranges = ARRAY_SIZE(msa311_writeonly_registers),
};

static const struct regmap_range msa311_volatile_registers[] = {
	regmap_reg_range(MSA311_ACC_X_REG, MSA311_ORIENT_STS_REG),

Annotation

Implementation Notes