drivers/iio/accel/sca3300.c
Source file repositories/reference/linux-study-clean/drivers/iio/accel/sca3300.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/iio/accel/sca3300.c- Extension
.c- Size
- 17872 bytes
- Lines
- 686
- Domain
- Driver Families
- Bucket
- drivers/iio
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitops.hlinux/crc8.hlinux/delay.hlinux/kernel.hlinux/module.hlinux/spi/spi.hlinux/unaligned.hlinux/iio/buffer.hlinux/iio/iio.hlinux/iio/sysfs.hlinux/iio/trigger_consumer.hlinux/iio/triggered_buffer.h
Detected Declarations
struct sca3300_chip_infostruct sca3300_dataenum sca3300_scan_indexesfunction sca3300_transferfunction sca3300_error_handlerfunction sca3300_read_regfunction sca3300_write_regfunction sca3300_set_op_modefunction sca3300_get_op_modefunction sca3300_set_frequencyfunction sca3300_write_rawfunction sca3300_read_rawfunction sca3300_trigger_handlerfunction iio_for_each_active_channelfunction sca3300_initfunction sca3300_debugfs_reg_accessfunction sca3300_read_availfunction sca3300_probe
Annotated Snippet
struct sca3300_chip_info {
const char *name;
const unsigned long *scan_masks;
const struct iio_chan_spec *channels;
u8 num_channels;
u8 num_accel_scales;
const int (*accel_scale)[2];
const int *accel_scale_map;
const int (*incli_scale)[2];
const int *incli_scale_map;
u8 num_incli_scales;
u8 num_freqs;
const int *freq_table;
const int *freq_map;
const int *avail_modes_table;
u8 num_avail_modes;
u8 chip_id;
bool angle_supported;
};
/**
* struct sca3300_data - device data
* @spi: SPI device structure
* @lock: Data buffer lock
* @chip: Sensor chip specific information
* @txbuf: Transmit buffer
* @rxbuf: Receive buffer
*/
struct sca3300_data {
struct spi_device *spi;
struct mutex lock;
const struct sca3300_chip_info *chip;
u8 txbuf[4] __aligned(IIO_DMA_MINALIGN);
u8 rxbuf[4];
};
static const struct sca3300_chip_info sca3300_chip_tbl[] = {
{
.name = "sca3300",
.scan_masks = sca3300_scan_masks,
.channels = sca3300_channels,
.num_channels = ARRAY_SIZE(sca3300_channels),
.num_accel_scales = ARRAY_SIZE(sca3300_accel_scale)*2,
.accel_scale = sca3300_accel_scale,
.accel_scale_map = sca3300_accel_scale_map,
.num_freqs = ARRAY_SIZE(sca3300_lp_freq),
.freq_table = sca3300_lp_freq,
.freq_map = sca3300_lp_freq_map,
.avail_modes_table = sca3300_avail_modes_map,
.num_avail_modes = 4,
.chip_id = SCA3300_WHOAMI_ID,
.angle_supported = false,
},
{
.name = "scl3300",
.scan_masks = scl3300_scan_masks,
.channels = scl3300_channels,
.num_channels = ARRAY_SIZE(scl3300_channels),
.num_accel_scales = ARRAY_SIZE(scl3300_accel_scale)*2,
.accel_scale = scl3300_accel_scale,
.accel_scale_map = scl3300_accel_scale_map,
.incli_scale = scl3300_incli_scale,
.incli_scale_map = scl3300_incli_scale_map,
.num_incli_scales = ARRAY_SIZE(scl3300_incli_scale)*2,
.num_freqs = ARRAY_SIZE(scl3300_lp_freq),
.freq_table = scl3300_lp_freq,
.freq_map = scl3300_lp_freq_map,
.avail_modes_table = scl3300_avail_modes_map,
.num_avail_modes = 3,
.chip_id = SCL3300_WHOAMI_ID,
.angle_supported = true,
},
};
DECLARE_CRC8_TABLE(sca3300_crc_table);
static int sca3300_transfer(struct sca3300_data *sca_data, int *val)
{
/* Consecutive requests min. 10 us delay (Datasheet section 5.1.2) */
struct spi_delay delay = { .value = 10, .unit = SPI_DELAY_UNIT_USECS };
int32_t ret;
int rs;
u8 crc;
struct spi_transfer xfers[2] = {
{
.tx_buf = sca_data->txbuf,
.len = ARRAY_SIZE(sca_data->txbuf),
.delay = delay,
.cs_change = 1,
},
Annotation
- Immediate include surface: `linux/bitops.h`, `linux/crc8.h`, `linux/delay.h`, `linux/kernel.h`, `linux/module.h`, `linux/spi/spi.h`, `linux/unaligned.h`, `linux/iio/buffer.h`.
- Detected declarations: `struct sca3300_chip_info`, `struct sca3300_data`, `enum sca3300_scan_indexes`, `function sca3300_transfer`, `function sca3300_error_handler`, `function sca3300_read_reg`, `function sca3300_write_reg`, `function sca3300_set_op_mode`, `function sca3300_get_op_mode`, `function sca3300_set_frequency`.
- Atlas domain: Driver Families / drivers/iio.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.