drivers/iio/adc/ad4062.c
Source file repositories/reference/linux-study-clean/drivers/iio/adc/ad4062.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/iio/adc/ad4062.c- Extension
.c- Size
- 41778 bytes
- Lines
- 1616
- Domain
- Driver Families
- Bucket
- drivers/iio
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/array_size.hlinux/bitfield.hlinux/bitops.hlinux/completion.hlinux/delay.hlinux/devm-helpers.hlinux/err.hlinux/gpio/driver.hlinux/i3c/device.hlinux/i3c/master.hlinux/iio/buffer.hlinux/iio/events.hlinux/iio/iio.hlinux/iio/sysfs.hlinux/iio/trigger.hlinux/iio/trigger_consumer.hlinux/iio/triggered_buffer.hlinux/interrupt.hlinux/jiffies.hlinux/math.hlinux/minmax.hlinux/pm_runtime.hlinux/property.hlinux/regmap.hlinux/regulator/consumer.hlinux/string.hlinux/types.hlinux/units.hlinux/unaligned.hlinux/util_macros.h
Detected Declarations
struct ad4062_chip_infostruct ad4062_stateenum ad4062_operation_modefunction sampling_frequency_showfunction sampling_frequency_store_dispatchfunction sampling_frequency_storefunction sampling_frequency_available_showfunction ad4062_set_oversampling_ratiofunction ad4062_get_oversampling_ratiofunction ad4062_calc_sampling_frequencyfunction ad4062_populate_sampling_frequencyfunction ad4062_get_sampling_frequencyfunction ad4062_set_sampling_frequencyfunction ad4062_check_idsfunction ad4062_conversion_frequency_setfunction ad4062_set_operation_modefunction ad4062_soft_resetfunction ad4062_setupfunction ad4062_irq_handler_threshfunction ad4062_irq_handler_drdyfunction ad4062_ibi_handlerfunction ad4062_trigger_workfunction ad4062_poll_handlerfunction ad4062_disable_ibifunction ad4062_free_ibifunction ad4062_request_ibifunction ad4062_request_irqfunction ad4062_request_triggerfunction ad4062_read_availfunction ad4062_get_chan_scalefunction ad4062_get_chan_calibscalefunction ad4062_set_chan_calibscalefunction ad4062_read_chan_rawfunction ad4062_read_raw_dispatchfunction ad4062_read_rawfunction ad4062_write_raw_dispatchfunction ad4062_write_rawfunction pm_ad4062_monitor_mode_enablefunction ad4062_monitor_mode_enablefunction ad4062_monitor_mode_disablefunction ad4062_read_event_configfunction ad4062_write_event_config_dispatchfunction ad4062_write_event_configfunction __ad4062_read_event_info_valuefunction __ad4062_read_event_info_hysteresisfunction ad4062_read_event_config_dispatchfunction ad4062_read_event_valuefunction __ad4062_write_event_info_value
Annotated Snippet
struct ad4062_chip_info {
const struct iio_chan_spec channels[1];
const char *name;
u16 prod_id;
u16 avg_max;
};
enum {
AD4062_SCAN_TYPE_SAMPLE,
AD4062_SCAN_TYPE_BURST_AVG,
};
static const struct iio_scan_type ad4062_scan_type_12_s[] = {
[AD4062_SCAN_TYPE_SAMPLE] = {
.sign = 's',
.realbits = 12,
.storagebits = 16,
.endianness = IIO_BE,
},
[AD4062_SCAN_TYPE_BURST_AVG] = {
.sign = 's',
.realbits = 14,
.storagebits = 16,
.endianness = IIO_BE,
},
};
static const struct iio_scan_type ad4062_scan_type_16_s[] = {
[AD4062_SCAN_TYPE_SAMPLE] = {
.sign = 's',
.realbits = 16,
.storagebits = 16,
.endianness = IIO_BE,
},
[AD4062_SCAN_TYPE_BURST_AVG] = {
.sign = 's',
.realbits = 20,
.storagebits = 32,
.endianness = IIO_BE,
},
};
static const unsigned int ad4062_conversion_freqs[] = {
2000000, 1000000, 300000, 100000, /* 0 - 3 */
33300, 10000, 3000, 500, /* 4 - 7 */
333, 250, 200, 166, /* 8 - 11 */
140, 124, 111, /* 12 - 15 */
};
struct ad4062_state {
const struct ad4062_chip_info *chip;
const struct ad4062_bus_ops *ops;
enum ad4062_operation_mode mode;
struct work_struct trig_conv;
struct completion completion;
struct iio_trigger *trigger;
struct iio_dev *indio_dev;
struct i3c_device *i3cdev;
struct regmap *regmap;
bool wait_event;
int vref_uV;
unsigned int samp_freqs[ARRAY_SIZE(ad4062_conversion_freqs)];
bool gpo_irq[2];
u16 sampling_frequency;
u16 events_frequency;
u8 oversamp_ratio;
u8 conv_sizeof;
u8 conv_addr;
union {
__be32 be32;
__be16 be16;
} buf __aligned(IIO_DMA_MINALIGN);
};
static const struct regmap_range ad4062_regmap_rd_ranges[] = {
regmap_reg_range(AD4062_REG_INTERFACE_CONFIG_A, AD4062_REG_DEVICE_GRADE),
regmap_reg_range(AD4062_REG_SCRATCH_PAD, AD4062_REG_INTERFACE_STATUS),
regmap_reg_range(AD4062_REG_MODE_SET, AD4062_REG_ADC_IBI_EN),
regmap_reg_range(AD4062_REG_FUSE_CRC, AD4062_REG_IBI_STATUS),
regmap_reg_range(AD4062_REG_CONV_READ_LSB, AD4062_REG_CONV_AUTO),
};
static const struct regmap_access_table ad4062_regmap_rd_table = {
.yes_ranges = ad4062_regmap_rd_ranges,
.n_yes_ranges = ARRAY_SIZE(ad4062_regmap_rd_ranges),
};
static const struct regmap_range ad4062_regmap_wr_ranges[] = {
regmap_reg_range(AD4062_REG_INTERFACE_CONFIG_A, AD4062_REG_DEVICE_CONFIG),
regmap_reg_range(AD4062_REG_SCRATCH_PAD, AD4062_REG_SCRATCH_PAD),
Annotation
- Immediate include surface: `linux/array_size.h`, `linux/bitfield.h`, `linux/bitops.h`, `linux/completion.h`, `linux/delay.h`, `linux/devm-helpers.h`, `linux/err.h`, `linux/gpio/driver.h`.
- Detected declarations: `struct ad4062_chip_info`, `struct ad4062_state`, `enum ad4062_operation_mode`, `function sampling_frequency_show`, `function sampling_frequency_store_dispatch`, `function sampling_frequency_store`, `function sampling_frequency_available_show`, `function ad4062_set_oversampling_ratio`, `function ad4062_get_oversampling_ratio`, `function ad4062_calc_sampling_frequency`.
- Atlas domain: Driver Families / drivers/iio.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.