drivers/iio/adc/ad7625.c

Source file repositories/reference/linux-study-clean/drivers/iio/adc/ad7625.c

File Facts

System
Linux kernel
Corpus path
drivers/iio/adc/ad7625.c
Extension
.c
Size
19529 bytes
Lines
688
Domain
Driver Families
Bucket
drivers/iio
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct ad7625_timing_spec {
	/* Max conversion high time (t_{CNVH}). */
	unsigned int conv_high_ns;
	/* Max conversion to MSB delay (t_{MSB}). */
	unsigned int conv_msb_ns;
};

struct ad7625_chip_info {
	const char *name;
	const unsigned int max_sample_freq_hz;
	const struct ad7625_timing_spec *timing_spec;
	const struct iio_chan_spec chan_spec;
	const bool has_power_down_state;
	const bool has_bandwidth_control;
	const bool has_internal_vref;
};

/* AD7625_CHAN_SPEC - Define a chan spec structure for a specific chip */
#define AD7625_CHAN_SPEC(_bits) {					\
	.type = IIO_VOLTAGE,						\
	.indexed = 1,							\
	.differential = 1,						\
	.channel = 0,							\
	.channel2 = 1,							\
	.info_mask_separate = BIT(IIO_CHAN_INFO_SCALE),			\
	.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),	\
	.scan_index = 0,						\
	.scan_type.sign = 's',						\
	.scan_type.storagebits = (_bits) > 16 ? 32 : 16,		\
	.scan_type.realbits = (_bits),					\
}

struct ad7625_state {
	const struct ad7625_chip_info *info;
	struct iio_backend *back;
	/* rate of the clock gated by the "clk_gate" PWM */
	u32 ref_clk_rate_hz;
	/* PWM burst signal for transferring acquired data to the host */
	struct pwm_device *clk_gate_pwm;
	/*
	 * PWM control signal for initiating data conversion. Analog
	 * inputs are sampled beginning on this signal's rising edge.
	 */
	struct pwm_device *cnv_pwm;
	/*
	 * Waveforms containing the last-requested and rounded
	 * properties for the clk_gate and cnv PWMs
	 */
	struct pwm_waveform clk_gate_wf;
	struct pwm_waveform cnv_wf;
	unsigned int vref_mv;
	u32 sampling_freq_hz;
	/*
	 * Optional GPIOs for controlling device state. EN0 and EN1
	 * determine voltage reference configuration and on/off state.
	 * EN2 controls the device -3dB bandwidth (and by extension, max
	 * sample rate). EN3 controls the VCM reference output. EN2 and
	 * EN3 are only present for the AD796x devices.
	 */
	struct gpio_desc *en_gpios[4];
	bool can_power_down;
	bool can_refin;
	bool can_ref_4v096;
	/*
	 * Indicate whether the bandwidth can be narrow (9MHz).
	 * When true, device sample rate must also be < 2MSPS.
	 */
	bool can_narrow_bandwidth;
	/* Indicate whether the bandwidth can be wide (28MHz). */
	bool can_wide_bandwidth;
	bool can_ref_5v;
	bool can_snooze;
	bool can_test_pattern;
	/* Indicate whether there is a REFIN supply connected */
	bool have_refin;
};

static const struct ad7625_timing_spec ad7625_timing_spec = {
	.conv_high_ns = 40,
	.conv_msb_ns = 145,
};

static const struct ad7625_timing_spec ad7626_timing_spec = {
	.conv_high_ns = 40,
	.conv_msb_ns = 80,
};

/*
 * conv_msb_ns is set to 0 instead of the datasheet maximum of 200ns to
 * avoid exceeding the minimum conversion time, i.e. it is effectively

Annotation

Implementation Notes