drivers/iio/adc/ad7887.c
Source file repositories/reference/linux-study-clean/drivers/iio/adc/ad7887.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/iio/adc/ad7887.c- Extension
.c- Size
- 8544 bytes
- Lines
- 348
- Domain
- Driver Families
- Bucket
- drivers/iio
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/device.hlinux/kernel.hlinux/slab.hlinux/sysfs.hlinux/spi/spi.hlinux/regulator/consumer.hlinux/err.hlinux/module.hlinux/interrupt.hlinux/bitops.hlinux/iio/iio.hlinux/iio/sysfs.hlinux/iio/buffer.hlinux/iio/trigger_consumer.hlinux/iio/triggered_buffer.hlinux/platform_data/ad7887.h
Detected Declarations
struct ad7887_chip_infostruct ad7887_stateenum ad7887_channelsenum ad7887_supported_device_idsfunction ad7887_ring_preenablefunction ad7887_ring_postdisablefunction ad7887_trigger_handlerfunction ad7887_scan_directfunction ad7887_read_rawfunction ad7887_reg_disablefunction ad7887_probe
Annotated Snippet
struct ad7887_chip_info {
u16 int_vref_mv;
const struct iio_chan_spec *channels;
unsigned int num_channels;
const struct iio_chan_spec *dual_channels;
unsigned int num_dual_channels;
};
struct ad7887_state {
struct spi_device *spi;
const struct ad7887_chip_info *chip_info;
struct regulator *reg;
struct spi_transfer xfer[4];
struct spi_message msg[3];
struct spi_message *ring_msg;
unsigned char tx_cmd_buf[4];
/*
* DMA (thus cache coherency maintenance) may require the
* transfer buffers to live in their own cache lines.
* Buffer needs to be large enough to hold two 16 bit samples and a
* 64 bit aligned 64 bit timestamp.
*/
unsigned char data[ALIGN(4, sizeof(s64)) + sizeof(s64)] __aligned(IIO_DMA_MINALIGN);
};
enum ad7887_supported_device_ids {
ID_AD7887
};
static int ad7887_ring_preenable(struct iio_dev *indio_dev)
{
struct ad7887_state *st = iio_priv(indio_dev);
/* We know this is a single long so can 'cheat' */
switch (*indio_dev->active_scan_mask) {
case (1 << 0):
st->ring_msg = &st->msg[AD7887_CH0];
break;
case (1 << 1):
st->ring_msg = &st->msg[AD7887_CH1];
/* Dummy read: push CH1 setting down to hardware */
spi_sync(st->spi, st->ring_msg);
break;
case ((1 << 1) | (1 << 0)):
st->ring_msg = &st->msg[AD7887_CH0_CH1];
break;
}
return 0;
}
static int ad7887_ring_postdisable(struct iio_dev *indio_dev)
{
struct ad7887_state *st = iio_priv(indio_dev);
/* dummy read: restore default CH0 settings */
return spi_sync(st->spi, &st->msg[AD7887_CH0]);
}
static irqreturn_t ad7887_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct ad7887_state *st = iio_priv(indio_dev);
int b_sent;
b_sent = spi_sync(st->spi, st->ring_msg);
if (b_sent)
goto done;
iio_push_to_buffers_with_timestamp(indio_dev, st->data,
iio_get_time_ns(indio_dev));
done:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static const struct iio_buffer_setup_ops ad7887_ring_setup_ops = {
.preenable = &ad7887_ring_preenable,
.postdisable = &ad7887_ring_postdisable,
};
static int ad7887_scan_direct(struct ad7887_state *st, unsigned ch)
{
int ret = spi_sync(st->spi, &st->msg[ch]);
if (ret)
return ret;
Annotation
- Immediate include surface: `linux/device.h`, `linux/kernel.h`, `linux/slab.h`, `linux/sysfs.h`, `linux/spi/spi.h`, `linux/regulator/consumer.h`, `linux/err.h`, `linux/module.h`.
- Detected declarations: `struct ad7887_chip_info`, `struct ad7887_state`, `enum ad7887_channels`, `enum ad7887_supported_device_ids`, `function ad7887_ring_preenable`, `function ad7887_ring_postdisable`, `function ad7887_trigger_handler`, `function ad7887_scan_direct`, `function ad7887_read_raw`, `function ad7887_reg_disable`.
- Atlas domain: Driver Families / drivers/iio.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.