drivers/iio/adc/ade9000.c

Source file repositories/reference/linux-study-clean/drivers/iio/adc/ade9000.c

File Facts

System
Linux kernel
Corpus path
drivers/iio/adc/ade9000.c
Extension
.c
Size
52182 bytes
Lines
1795
Domain
Driver Families
Bucket
drivers/iio
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct ade9000_state {
	struct completion reset_completion;
	struct mutex lock; /* Protects SPI transactions */
	u8 wf_src;
	u32 wfb_trg;
	u8 wfb_nr_activ_chan;
	u32 wfb_nr_samples;
	struct spi_device *spi;
	struct clk *clkin;
	struct spi_transfer xfer[2];
	struct spi_message spi_msg;
	struct regmap *regmap;
	union{
		u8 byte[ADE9000_WFB_FULL_BUFF_SIZE];
		__be32 word[ADE9000_WFB_FULL_BUFF_NR_SAMPLES];
	} rx_buff __aligned(IIO_DMA_MINALIGN);
	u8 tx_buff[2] __aligned(IIO_DMA_MINALIGN);
	unsigned int bulk_read_buf[2];
};

struct ade9000_irq1_event {
	u32 bit_mask;
	enum iio_chan_type chan_type;
	u32 channel;
	enum iio_event_type event_type;
	enum iio_event_direction event_dir;
};

static const struct ade9000_irq1_event ade9000_irq1_events[] = {
	{ ADE9000_ST1_ZXVA_BIT, IIO_VOLTAGE, ADE9000_PHASE_A_NR, IIO_EV_TYPE_THRESH, IIO_EV_DIR_EITHER },
	{ ADE9000_ST1_ZXIA_BIT, IIO_CURRENT, ADE9000_PHASE_A_NR, IIO_EV_TYPE_THRESH, IIO_EV_DIR_EITHER },
	{ ADE9000_ST1_ZXVB_BIT, IIO_VOLTAGE, ADE9000_PHASE_B_NR, IIO_EV_TYPE_THRESH, IIO_EV_DIR_EITHER },
	{ ADE9000_ST1_ZXIB_BIT, IIO_CURRENT, ADE9000_PHASE_B_NR, IIO_EV_TYPE_THRESH, IIO_EV_DIR_EITHER },
	{ ADE9000_ST1_ZXVC_BIT, IIO_VOLTAGE, ADE9000_PHASE_C_NR, IIO_EV_TYPE_THRESH, IIO_EV_DIR_EITHER },
	{ ADE9000_ST1_ZXIC_BIT, IIO_CURRENT, ADE9000_PHASE_C_NR, IIO_EV_TYPE_THRESH, IIO_EV_DIR_EITHER },
	{ ADE9000_ST1_SWELLA_BIT, IIO_ALTVOLTAGE, ADE9000_PHASE_A_NR, IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING },
	{ ADE9000_ST1_SWELLB_BIT, IIO_ALTVOLTAGE, ADE9000_PHASE_B_NR, IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING },
	{ ADE9000_ST1_SWELLC_BIT, IIO_ALTVOLTAGE, ADE9000_PHASE_C_NR, IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING },
	{ ADE9000_ST1_DIPA_BIT, IIO_ALTVOLTAGE, ADE9000_PHASE_A_NR, IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING },
	{ ADE9000_ST1_DIPB_BIT, IIO_ALTVOLTAGE, ADE9000_PHASE_B_NR, IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING },
	{ ADE9000_ST1_DIPC_BIT, IIO_ALTVOLTAGE, ADE9000_PHASE_C_NR, IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING },
};

/* Voltage events (zero crossing on instantaneous voltage) */
static const struct iio_event_spec ade9000_voltage_events[] = {
	{
		/* Zero crossing detection - datasheet: ZXV interrupts */
		.type = IIO_EV_TYPE_THRESH,
		.dir = IIO_EV_DIR_EITHER,
		.mask_separate = BIT(IIO_EV_INFO_ENABLE),
	},
};

/* Current events (zero crossing on instantaneous current) */
static const struct iio_event_spec ade9000_current_events[] = {
	{
		/* Zero crossing detection - datasheet: ZXI interrupts */
		.type = IIO_EV_TYPE_THRESH,
		.dir = IIO_EV_DIR_EITHER,
		.mask_separate = BIT(IIO_EV_INFO_ENABLE),
	},
};

/* RMS voltage events (swell/sag detection on RMS values) */
static const struct iio_event_spec ade9000_rms_voltage_events[] = {
	{
		.type = IIO_EV_TYPE_THRESH,
		.dir = IIO_EV_DIR_RISING, /* RMS swell detection */
		.mask_separate = BIT(IIO_EV_INFO_ENABLE) | BIT(IIO_EV_INFO_VALUE),
	},
	{
		.type = IIO_EV_TYPE_THRESH,
		.dir = IIO_EV_DIR_FALLING, /* RMS sag/dip detection */
		.mask_separate = BIT(IIO_EV_INFO_ENABLE) | BIT(IIO_EV_INFO_VALUE),
	},
};

static const char * const ade9000_filter_type_items[] = {
	"sinc4", "sinc4+lp",
};

static const int ade9000_filter_type_values[] = {
	0, 2,
};

static int ade9000_filter_type_get(struct iio_dev *indio_dev,
				   const struct iio_chan_spec *chan)
{
	struct ade9000_state *st = iio_priv(indio_dev);
	u32 val;

Annotation

Implementation Notes