drivers/iio/adc/rtq6056.c
Source file repositories/reference/linux-study-clean/drivers/iio/adc/rtq6056.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/iio/adc/rtq6056.c- Extension
.c- Size
- 23586 bytes
- Lines
- 894
- Domain
- Driver Families
- Bucket
- drivers/iio
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitops.hlinux/delay.hlinux/i2c.hlinux/kernel.hlinux/mod_devicetable.hlinux/module.hlinux/pm_runtime.hlinux/property.hlinux/regmap.hlinux/sysfs.hlinux/types.hlinux/util_macros.hlinux/iio/buffer.hlinux/iio/iio.hlinux/iio/sysfs.hlinux/iio/trigger_consumer.hlinux/iio/triggered_buffer.h
Detected Declarations
struct rtq6056_privstruct richtek_dev_datastruct rtq6056_privfunction rtq6056_adc_read_channelfunction rtq6056_adc_read_scalefunction rtq6059_adc_read_scalefunction rtq6056_adc_set_samp_freqfunction rtq6056_adc_set_averagefunction rtq6059_adc_set_averagefunction rtq6056_adc_get_sample_freqfunction rtq6056_adc_read_rawfunction rtq6056_adc_read_availfunction __rtq6056_adc_write_rawfunction rtq6056_adc_write_rawfunction rtq6056_adc_read_labelfunction rtq6056_set_shunt_resistorfunction shunt_resistor_showfunction shunt_resistor_storefunction rtq6056_buffer_trigger_handlerfunction iio_for_each_active_channelfunction rtq6056_enter_shutdown_statefunction rtq6056_is_readable_regfunction rtq6056_is_writeable_regfunction rtq6056_probefunction rtq6056_runtime_suspendfunction rtq6056_runtime_resume
Annotated Snippet
struct richtek_dev_data {
bool fixed_samp_freq;
u8 vbus_offset;
int default_conv_time_us;
unsigned int default_config;
unsigned int calib_coefficient;
const int *avg_sample_list;
int avg_sample_list_length;
const struct reg_field *reg_fields;
const struct iio_chan_spec *channels;
int num_channels;
int (*read_scale)(struct iio_chan_spec const *ch, int *val, int *val2);
int (*set_average)(struct rtq6056_priv *priv, int val);
};
struct rtq6056_priv {
struct device *dev;
struct regmap *regmap;
struct regmap_field *rm_fields[F_MAX_FIELDS];
const struct richtek_dev_data *devdata;
u32 shunt_resistor_uohm;
int vshuntct_us;
int vbusct_us;
int avg_sample;
};
static const struct reg_field rtq6056_reg_fields[F_MAX_FIELDS] = {
[F_OPMODE] = REG_FIELD(RTQ6056_REG_CONFIG, 0, 2),
[F_VSHUNTCT] = REG_FIELD(RTQ6056_REG_CONFIG, 3, 5),
[F_VBUSCT] = REG_FIELD(RTQ6056_REG_CONFIG, 6, 8),
[F_AVG] = REG_FIELD(RTQ6056_REG_CONFIG, 9, 11),
[F_RESET] = REG_FIELD(RTQ6056_REG_CONFIG, 15, 15),
};
static const struct reg_field rtq6059_reg_fields[F_MAX_FIELDS] = {
[F_OPMODE] = REG_FIELD(RTQ6056_REG_CONFIG, 0, 2),
[F_RTQ6059_SADC] = REG_FIELD(RTQ6056_REG_CONFIG, 3, 6),
[F_RTQ6059_BADC] = REG_FIELD(RTQ6056_REG_CONFIG, 7, 10),
[F_RTQ6059_PGA] = REG_FIELD(RTQ6056_REG_CONFIG, 11, 12),
[F_RESET] = REG_FIELD(RTQ6056_REG_CONFIG, 15, 15),
};
static const struct iio_chan_spec rtq6056_channels[RTQ6056_MAX_CHANNEL + 1] = {
{
.type = IIO_VOLTAGE,
.indexed = 1,
.channel = 0,
.address = RTQ6056_REG_SHUNTVOLT,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ),
.info_mask_separate_available = BIT(IIO_CHAN_INFO_SAMP_FREQ),
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
.info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
.scan_index = 0,
.scan_type = {
.sign = 's',
.realbits = 16,
.storagebits = 16,
.endianness = IIO_CPU,
},
},
{
.type = IIO_VOLTAGE,
.indexed = 1,
.channel = 1,
.address = RTQ6056_REG_BUSVOLT,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ),
.info_mask_separate_available = BIT(IIO_CHAN_INFO_SAMP_FREQ),
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
.info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
.scan_index = 1,
.scan_type = {
.sign = 'u',
.realbits = 16,
.storagebits = 16,
.endianness = IIO_CPU,
},
},
{
.type = IIO_POWER,
.indexed = 1,
.channel = 2,
.address = RTQ6056_REG_POWER,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ),
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
Annotation
- Immediate include surface: `linux/bitops.h`, `linux/delay.h`, `linux/i2c.h`, `linux/kernel.h`, `linux/mod_devicetable.h`, `linux/module.h`, `linux/pm_runtime.h`, `linux/property.h`.
- Detected declarations: `struct rtq6056_priv`, `struct richtek_dev_data`, `struct rtq6056_priv`, `function rtq6056_adc_read_channel`, `function rtq6056_adc_read_scale`, `function rtq6059_adc_read_scale`, `function rtq6056_adc_set_samp_freq`, `function rtq6056_adc_set_average`, `function rtq6059_adc_set_average`, `function rtq6056_adc_get_sample_freq`.
- Atlas domain: Driver Families / drivers/iio.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.