drivers/iio/adc/stm32-adc.c

Source file repositories/reference/linux-study-clean/drivers/iio/adc/stm32-adc.c

File Facts

System
Linux kernel
Corpus path
drivers/iio/adc/stm32-adc.c
Extension
.c
Size
80155 bytes
Lines
2801
Domain
Driver Families
Bucket
drivers/iio
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct stm32_adc_ic {
	const char *name;
	u32 idx;
};

static const struct stm32_adc_ic stm32_adc_ic[STM32_ADC_INT_CH_NB] = {
	{ "vddcore", STM32_ADC_INT_CH_VDDCORE },
	{ "vddcpu", STM32_ADC_INT_CH_VDDCPU },
	{ "vddq_ddr", STM32_ADC_INT_CH_VDDQ_DDR },
	{ "vrefint", STM32_ADC_INT_CH_VREFINT },
	{ "vbat", STM32_ADC_INT_CH_VBAT },
};

/**
 * struct stm32_adc_trig_info - ADC trigger info
 * @name:		name of the trigger, corresponding to its source
 * @extsel:		trigger selection
 */
struct stm32_adc_trig_info {
	const char *name;
	enum stm32_adc_extsel extsel;
};

/**
 * struct stm32_adc_calib - optional adc calibration data
 * @lincalfact: Linearity calibration factor
 * @lincal_saved: Indicates that linear calibration factors are saved
 */
struct stm32_adc_calib {
	u32			lincalfact[STM32H7_LINCALFACT_NUM];
	bool			lincal_saved;
};

/**
 * struct stm32_adc_regs - stm32 ADC misc registers & bitfield desc
 * @reg:		register offset
 * @mask:		bitfield mask
 * @shift:		left shift
 */
struct stm32_adc_regs {
	int reg;
	int mask;
	int shift;
};

/**
 * struct stm32_adc_vrefint - stm32 ADC internal reference voltage data
 * @vrefint_cal:	vrefint calibration value from nvmem
 * @vrefint_data:	vrefint actual value
 */
struct stm32_adc_vrefint {
	u32 vrefint_cal;
	u32 vrefint_data;
};

/**
 * struct stm32_adc_regspec - stm32 registers definition
 * @dr:			data register offset
 * @ier_eoc:		interrupt enable register & eocie bitfield
 * @ier_ovr:		interrupt enable register & overrun bitfield
 * @isr_eoc:		interrupt status register & eoc bitfield
 * @isr_ovr:		interrupt status register & overrun bitfield
 * @sqr:		reference to sequence registers array
 * @exten:		trigger control register & bitfield
 * @extsel:		trigger selection register & bitfield
 * @res:		resolution selection register & bitfield
 * @difsel:		differential mode selection register & bitfield
 * @smpr:		smpr1 & smpr2 registers offset array
 * @smp_bits:		smpr1 & smpr2 index and bitfields
 * @or_vddcore:		option register & vddcore bitfield
 * @or_vddcpu:		option register & vddcpu bitfield
 * @or_vddq_ddr:	option register & vddq_ddr bitfield
 * @ccr_vbat:		common register & vbat bitfield
 * @ccr_vref:		common register & vrefint bitfield
 */
struct stm32_adc_regspec {
	const u32 dr;
	const struct stm32_adc_regs ier_eoc;
	const struct stm32_adc_regs ier_ovr;
	const struct stm32_adc_regs isr_eoc;
	const struct stm32_adc_regs isr_ovr;
	const struct stm32_adc_regs *sqr;
	const struct stm32_adc_regs exten;
	const struct stm32_adc_regs extsel;
	const struct stm32_adc_regs res;
	const struct stm32_adc_regs difsel;
	const u32 smpr[2];
	const struct stm32_adc_regs *smp_bits;
	const struct stm32_adc_regs or_vddcore;
	const struct stm32_adc_regs or_vddcpu;

Annotation

Implementation Notes