drivers/iio/adc/stm32-dfsdm-adc.c
Source file repositories/reference/linux-study-clean/drivers/iio/adc/stm32-dfsdm-adc.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/iio/adc/stm32-dfsdm-adc.c- Extension
.c- Size
- 50106 bytes
- Lines
- 1912
- Domain
- Driver Families
- Bucket
- drivers/iio
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/dmaengine.hlinux/dma-mapping.hlinux/export.hlinux/iio/adc/stm32-dfsdm-adc.hlinux/iio/backend.hlinux/iio/buffer.hlinux/iio/hw-consumer.hlinux/iio/sysfs.hlinux/iio/timer/stm32-lptim-trigger.hlinux/iio/timer/stm32-timer-trigger.hlinux/iio/trigger.hlinux/iio/trigger_consumer.hlinux/iio/triggered_buffer.hlinux/interrupt.hlinux/module.hlinux/of.hlinux/of_platform.hlinux/platform_device.hlinux/regmap.hlinux/slab.hstm32-dfsdm.h
Detected Declarations
struct stm32_dfsdm_dev_datastruct stm32_dfsdm_adcstruct stm32_dfsdm_str2fieldstruct stm32_dfsdm_trig_infoenum sd_converter_typeenum stm32_dfsdm_jextenfunction stm32_dfsdm_str2valfunction stm32_dfsdm_get_jextselfunction stm32_dfsdm_compute_osrsfunction stm32_dfsdm_compute_all_osrsfunction stm32_dfsdm_start_channelfunction for_each_set_bitfunction stm32_dfsdm_stop_channelfunction for_each_set_bitfunction stm32_dfsdm_chan_configurefunction stm32_dfsdm_start_filterfunction stm32_dfsdm_stop_filterfunction stm32_dfsdm_filter_set_trigfunction stm32_dfsdm_channels_configurefunction for_each_set_bitfunction stm32_dfsdm_filter_configurefunction for_each_set_bitfunction stm32_dfsdm_channel_parse_offunction stm32_dfsdm_generic_channel_parse_offunction dfsdm_adc_audio_get_spiclkfunction dfsdm_adc_set_samp_freqfunction dfsdm_adc_audio_set_spiclkfunction stm32_dfsdm_start_convfunction stm32_dfsdm_stop_convfunction stm32_dfsdm_set_watermarkfunction stm32_dfsdm_adc_dma_residuefunction stm32_dfsdm_process_datafunction stm32_dfsdm_dma_buffer_donefunction stm32_dfsdm_adc_dma_startfunction stm32_dfsdm_adc_dma_stopfunction stm32_dfsdm_update_scan_modefunction stm32_dfsdm_postenablefunction stm32_dfsdm_predisablefunction stm32_dfsdm_get_buff_cbfunction stm32_dfsdm_release_buff_cbfunction stm32_dfsdm_single_convfunction stm32_dfsdm_write_rawfunction __stm32_dfsdm_read_info_rawfunction stm32_dfsdm_read_rawfunction stm32_dfsdm_validate_triggerfunction stm32_dfsdm_irqfunction stm32_dfsdm_dma_releasefunction stm32_dfsdm_dma_request
Annotated Snippet
struct stm32_dfsdm_dev_data {
int type;
int (*init)(struct device *dev, struct iio_dev *indio_dev);
unsigned int num_channels;
const struct regmap_config *regmap_cfg;
};
struct stm32_dfsdm_adc {
struct stm32_dfsdm *dfsdm;
const struct stm32_dfsdm_dev_data *dev_data;
unsigned int fl_id;
unsigned int nconv;
unsigned long smask;
/* ADC specific */
unsigned int oversamp;
struct iio_hw_consumer *hwc;
struct iio_backend **backend;
struct completion completion;
u32 *buffer;
/* Audio specific */
unsigned int spi_freq; /* SPI bus clock frequency */
unsigned int sample_freq; /* Sample frequency after filter decimation */
int (*cb)(const void *data, size_t size, void *cb_priv);
void *cb_priv;
/* DMA */
u8 *rx_buf;
unsigned int bufi; /* Buffer current position */
unsigned int buf_sz; /* Buffer size */
struct dma_chan *dma_chan;
dma_addr_t dma_buf;
};
struct stm32_dfsdm_str2field {
const char *name;
unsigned int val;
};
/* DFSDM channel serial interface type */
static const struct stm32_dfsdm_str2field stm32_dfsdm_chan_type[] = {
{ "SPI_R", 0 }, /* SPI with data on rising edge */
{ "SPI_F", 1 }, /* SPI with data on falling edge */
{ "MANCH_R", 2 }, /* Manchester codec, rising edge = logic 0 */
{ "MANCH_F", 3 }, /* Manchester codec, falling edge = logic 1 */
{ }
};
/* DFSDM channel clock source */
static const struct stm32_dfsdm_str2field stm32_dfsdm_chan_src[] = {
/* External SPI clock (CLKIN x) */
{ "CLKIN", DFSDM_CHANNEL_SPI_CLOCK_EXTERNAL },
/* Internal SPI clock (CLKOUT) */
{ "CLKOUT", DFSDM_CHANNEL_SPI_CLOCK_INTERNAL },
/* Internal SPI clock divided by 2 (falling edge) */
{ "CLKOUT_F", DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_FALLING },
/* Internal SPI clock divided by 2 (falling edge) */
{ "CLKOUT_R", DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_RISING },
{ }
};
static int stm32_dfsdm_str2val(const char *str,
const struct stm32_dfsdm_str2field *list)
{
const struct stm32_dfsdm_str2field *p = list;
for (p = list; p && p->name; p++)
if (!strcmp(p->name, str))
return p->val;
return -EINVAL;
}
/**
* struct stm32_dfsdm_trig_info - DFSDM trigger info
* @name: name of the trigger, corresponding to its source
* @jextsel: trigger signal selection
*/
struct stm32_dfsdm_trig_info {
const char *name;
unsigned int jextsel;
};
/* hardware injected trigger enable, edge selection */
enum stm32_dfsdm_jexten {
STM32_DFSDM_JEXTEN_DISABLED,
STM32_DFSDM_JEXTEN_RISING_EDGE,
STM32_DFSDM_JEXTEN_FALLING_EDGE,
STM32_DFSDM_EXTEN_BOTH_EDGES,
Annotation
- Immediate include surface: `linux/dmaengine.h`, `linux/dma-mapping.h`, `linux/export.h`, `linux/iio/adc/stm32-dfsdm-adc.h`, `linux/iio/backend.h`, `linux/iio/buffer.h`, `linux/iio/hw-consumer.h`, `linux/iio/sysfs.h`.
- Detected declarations: `struct stm32_dfsdm_dev_data`, `struct stm32_dfsdm_adc`, `struct stm32_dfsdm_str2field`, `struct stm32_dfsdm_trig_info`, `enum sd_converter_type`, `enum stm32_dfsdm_jexten`, `function stm32_dfsdm_str2val`, `function stm32_dfsdm_get_jextsel`, `function stm32_dfsdm_compute_osrs`, `function stm32_dfsdm_compute_all_osrs`.
- Atlas domain: Driver Families / drivers/iio.
- Implementation status: integration implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.