drivers/iio/adc/ti-ads124s08.c
Source file repositories/reference/linux-study-clean/drivers/iio/adc/ti-ads124s08.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/iio/adc/ti-ads124s08.c- Extension
.c- Size
- 9186 bytes
- Lines
- 377
- Domain
- Driver Families
- Bucket
- drivers/iio
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/err.hlinux/delay.hlinux/device.hlinux/kernel.hlinux/module.hlinux/mod_devicetable.hlinux/slab.hlinux/sysfs.hlinux/gpio/consumer.hlinux/spi/spi.hlinux/iio/iio.hlinux/iio/buffer.hlinux/iio/trigger_consumer.hlinux/iio/triggered_buffer.hlinux/iio/sysfs.hlinux/unaligned.h
Detected Declarations
struct ads124s_chip_infostruct ads124s_privateenum ads124s_idfunction ads124s_write_cmdfunction ads124s_write_regfunction ads124s_resetfunction ads124s_readfunction ads124s_read_rawfunction ads124s_trigger_handlerfunction iio_for_each_active_channelfunction ads124s_probe
Annotated Snippet
struct ads124s_chip_info {
const struct iio_chan_spec *channels;
unsigned int num_channels;
};
struct ads124s_private {
const struct ads124s_chip_info *chip_info;
struct gpio_desc *reset_gpio;
struct spi_device *spi;
struct mutex lock;
/*
* Used to correctly align data.
* Ensure timestamp is naturally aligned.
* Note that the full buffer length may not be needed if not
* all channels are enabled, as long as the alignment of the
* timestamp is maintained.
*/
u32 buffer[ADS124S08_MAX_CHANNELS + sizeof(s64)/sizeof(u32)] __aligned(8);
u8 data[5] __aligned(IIO_DMA_MINALIGN);
};
#define ADS124S08_CHAN(index) \
{ \
.type = IIO_VOLTAGE, \
.indexed = 1, \
.channel = index, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.scan_index = index, \
.scan_type = { \
.sign = 'u', \
.realbits = 32, \
.storagebits = 32, \
}, \
}
static const struct iio_chan_spec ads124s06_channels[] = {
ADS124S08_CHAN(0),
ADS124S08_CHAN(1),
ADS124S08_CHAN(2),
ADS124S08_CHAN(3),
ADS124S08_CHAN(4),
ADS124S08_CHAN(5),
};
static const struct iio_chan_spec ads124s08_channels[] = {
ADS124S08_CHAN(0),
ADS124S08_CHAN(1),
ADS124S08_CHAN(2),
ADS124S08_CHAN(3),
ADS124S08_CHAN(4),
ADS124S08_CHAN(5),
ADS124S08_CHAN(6),
ADS124S08_CHAN(7),
ADS124S08_CHAN(8),
ADS124S08_CHAN(9),
ADS124S08_CHAN(10),
ADS124S08_CHAN(11),
};
static const struct ads124s_chip_info ads124s_chip_info_tbl[] = {
[ADS124S08_ID] = {
.channels = ads124s08_channels,
.num_channels = ARRAY_SIZE(ads124s08_channels),
},
[ADS124S06_ID] = {
.channels = ads124s06_channels,
.num_channels = ARRAY_SIZE(ads124s06_channels),
},
};
static int ads124s_write_cmd(struct iio_dev *indio_dev, u8 command)
{
struct ads124s_private *priv = iio_priv(indio_dev);
priv->data[0] = command;
return spi_write(priv->spi, &priv->data[0], 1);
}
static int ads124s_write_reg(struct iio_dev *indio_dev, u8 reg, u8 data)
{
struct ads124s_private *priv = iio_priv(indio_dev);
priv->data[0] = ADS124S08_CMD_WREG | reg;
priv->data[1] = 0x0;
priv->data[2] = data;
return spi_write(priv->spi, &priv->data[0], 3);
}
Annotation
- Immediate include surface: `linux/err.h`, `linux/delay.h`, `linux/device.h`, `linux/kernel.h`, `linux/module.h`, `linux/mod_devicetable.h`, `linux/slab.h`, `linux/sysfs.h`.
- Detected declarations: `struct ads124s_chip_info`, `struct ads124s_private`, `enum ads124s_id`, `function ads124s_write_cmd`, `function ads124s_write_reg`, `function ads124s_reset`, `function ads124s_read`, `function ads124s_read_raw`, `function ads124s_trigger_handler`, `function iio_for_each_active_channel`.
- Atlas domain: Driver Families / drivers/iio.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.