drivers/iio/adc/ti-tlc4541.c
Source file repositories/reference/linux-study-clean/drivers/iio/adc/ti-tlc4541.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/iio/adc/ti-tlc4541.c- Extension
.c- Size
- 6714 bytes
- Lines
- 264
- Domain
- Driver Families
- Bucket
- drivers/iio
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/delay.hlinux/device.hlinux/err.hlinux/interrupt.hlinux/iio/iio.hlinux/iio/sysfs.hlinux/iio/buffer.hlinux/iio/trigger_consumer.hlinux/iio/triggered_buffer.hlinux/kernel.hlinux/module.hlinux/mod_devicetable.hlinux/regulator/consumer.hlinux/slab.hlinux/spi/spi.hlinux/sysfs.h
Detected Declarations
struct tlc4541_statestruct tlc4541_chip_infoenum tlc4541_idfunction tlc4541_trigger_handlerfunction tlc4541_get_rangefunction tlc4541_read_rawfunction tlc4541_probefunction tlc4541_remove
Annotated Snippet
struct tlc4541_state {
struct spi_device *spi;
struct regulator *reg;
struct spi_transfer scan_single_xfer[3];
struct spi_message scan_single_msg;
/*
* DMA (thus cache coherency maintenance) may require the
* transfer buffers to live in their own cache lines.
* 2 bytes data + 6 bytes padding + 8 bytes timestamp when
* call iio_push_to_buffers_with_timestamp.
*/
__be16 rx_buf[8] __aligned(IIO_DMA_MINALIGN);
};
struct tlc4541_chip_info {
const struct iio_chan_spec *channels;
unsigned int num_channels;
};
enum tlc4541_id {
TLC3541,
TLC4541,
};
#define TLC4541_V_CHAN(bits, bitshift) { \
.type = IIO_VOLTAGE, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
.scan_type = { \
.sign = 'u', \
.realbits = (bits), \
.storagebits = 16, \
.shift = (bitshift), \
.endianness = IIO_BE, \
}, \
}
#define DECLARE_TLC4541_CHANNELS(name, bits, bitshift) \
const struct iio_chan_spec name ## _channels[] = { \
TLC4541_V_CHAN(bits, bitshift), \
IIO_CHAN_SOFT_TIMESTAMP(1), \
}
static DECLARE_TLC4541_CHANNELS(tlc3541, 14, 2);
static DECLARE_TLC4541_CHANNELS(tlc4541, 16, 0);
static const struct tlc4541_chip_info tlc4541_chip_info[] = {
[TLC3541] = {
.channels = tlc3541_channels,
.num_channels = ARRAY_SIZE(tlc3541_channels),
},
[TLC4541] = {
.channels = tlc4541_channels,
.num_channels = ARRAY_SIZE(tlc4541_channels),
},
};
static irqreturn_t tlc4541_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct tlc4541_state *st = iio_priv(indio_dev);
int ret;
ret = spi_sync(st->spi, &st->scan_single_msg);
if (ret < 0)
goto done;
iio_push_to_buffers_with_ts(indio_dev, st->rx_buf, sizeof(st->rx_buf),
iio_get_time_ns(indio_dev));
done:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static int tlc4541_get_range(struct tlc4541_state *st)
{
int vref;
vref = regulator_get_voltage(st->reg);
if (vref < 0)
return vref;
vref /= 1000;
return vref;
}
Annotation
- Immediate include surface: `linux/delay.h`, `linux/device.h`, `linux/err.h`, `linux/interrupt.h`, `linux/iio/iio.h`, `linux/iio/sysfs.h`, `linux/iio/buffer.h`, `linux/iio/trigger_consumer.h`.
- Detected declarations: `struct tlc4541_state`, `struct tlc4541_chip_info`, `enum tlc4541_id`, `function tlc4541_trigger_handler`, `function tlc4541_get_range`, `function tlc4541_read_raw`, `function tlc4541_probe`, `function tlc4541_remove`.
- Atlas domain: Driver Families / drivers/iio.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.