drivers/iio/adc/xilinx-xadc.h
Source file repositories/reference/linux-study-clean/drivers/iio/adc/xilinx-xadc.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/iio/adc/xilinx-xadc.h- Extension
.h- Size
- 5853 bytes
- Lines
- 215
- Domain
- Driver Families
- Bucket
- drivers/iio
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/interrupt.hlinux/mutex.hlinux/spinlock.h
Detected Declarations
struct iio_devstruct clkstruct xadc_opsstruct platform_devicestruct xadcstruct xadc_opsenum xadc_external_mux_modeenum xadc_typefunction _xadc_read_adc_regfunction _xadc_write_adc_regfunction xadc_read_adc_regfunction xadc_write_adc_reg
Annotated Snippet
struct xadc {
void __iomem *base;
struct clk *clk;
const struct xadc_ops *ops;
uint16_t threshold[16];
uint16_t temp_hysteresis;
unsigned int alarm_mask;
uint16_t *data;
struct iio_trigger *trigger;
struct iio_trigger *convst_trigger;
struct iio_trigger *samplerate_trigger;
enum xadc_external_mux_mode external_mux_mode;
unsigned int zynq_masked_alarm;
unsigned int zynq_intmask;
struct delayed_work zynq_unmask_work;
struct mutex mutex;
spinlock_t lock;
struct completion completion;
};
enum xadc_type {
XADC_TYPE_S7, /* Series 7 */
XADC_TYPE_US, /* UltraScale and UltraScale+ */
};
struct xadc_ops {
int (*read)(struct xadc *xadc, unsigned int reg, uint16_t *val);
int (*write)(struct xadc *xadc, unsigned int reg, uint16_t val);
int (*setup)(struct platform_device *pdev, struct iio_dev *indio_dev,
int irq);
void (*update_alarm)(struct xadc *xadc, unsigned int alarm);
unsigned long (*get_dclk_rate)(struct xadc *xadc);
irqreturn_t (*interrupt_handler)(int irq, void *devid);
unsigned int flags;
enum xadc_type type;
int temp_scale;
int temp_offset;
};
static inline int _xadc_read_adc_reg(struct xadc *xadc, unsigned int reg,
uint16_t *val)
{
lockdep_assert_held(&xadc->mutex);
return xadc->ops->read(xadc, reg, val);
}
static inline int _xadc_write_adc_reg(struct xadc *xadc, unsigned int reg,
uint16_t val)
{
lockdep_assert_held(&xadc->mutex);
return xadc->ops->write(xadc, reg, val);
}
static inline int xadc_read_adc_reg(struct xadc *xadc, unsigned int reg,
uint16_t *val)
{
int ret;
mutex_lock(&xadc->mutex);
ret = _xadc_read_adc_reg(xadc, reg, val);
mutex_unlock(&xadc->mutex);
return ret;
}
static inline int xadc_write_adc_reg(struct xadc *xadc, unsigned int reg,
uint16_t val)
{
int ret;
mutex_lock(&xadc->mutex);
ret = _xadc_write_adc_reg(xadc, reg, val);
mutex_unlock(&xadc->mutex);
return ret;
}
/* XADC hardmacro register definitions */
#define XADC_REG_TEMP 0x00
#define XADC_REG_VCCINT 0x01
#define XADC_REG_VCCAUX 0x02
#define XADC_REG_VPVN 0x03
#define XADC_REG_VREFP 0x04
Annotation
- Immediate include surface: `linux/interrupt.h`, `linux/mutex.h`, `linux/spinlock.h`.
- Detected declarations: `struct iio_dev`, `struct clk`, `struct xadc_ops`, `struct platform_device`, `struct xadc`, `struct xadc_ops`, `enum xadc_external_mux_mode`, `enum xadc_type`, `function _xadc_read_adc_reg`, `function _xadc_write_adc_reg`.
- Atlas domain: Driver Families / drivers/iio.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.