drivers/iio/addac/stx104.c

Source file repositories/reference/linux-study-clean/drivers/iio/addac/stx104.c

File Facts

System
Linux kernel
Corpus path
drivers/iio/addac/stx104.c
Extension
.c
Size
14737 bytes
Lines
524
Domain
Driver Families
Bucket
drivers/iio
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct stx104_iio {
	struct mutex lock;
	struct regmap *aio_data_map;
	struct regmap *aio_ctl_map;
};

static const struct regmap_range aio_ctl_wr_ranges[] = {
	regmap_reg_range(0x0, 0x0), regmap_reg_range(0x2, 0x2), regmap_reg_range(0x9, 0x9),
	regmap_reg_range(0x11, 0x11),
};
static const struct regmap_range aio_ctl_rd_ranges[] = {
	regmap_reg_range(0x2, 0x2), regmap_reg_range(0x8, 0x9), regmap_reg_range(0x11, 0x11),
};
static const struct regmap_range aio_ctl_volatile_ranges[] = {
	regmap_reg_range(0x8, 0x8),
};
static const struct regmap_access_table aio_ctl_wr_table = {
	.yes_ranges = aio_ctl_wr_ranges,
	.n_yes_ranges = ARRAY_SIZE(aio_ctl_wr_ranges),
};
static const struct regmap_access_table aio_ctl_rd_table = {
	.yes_ranges = aio_ctl_rd_ranges,
	.n_yes_ranges = ARRAY_SIZE(aio_ctl_rd_ranges),
};
static const struct regmap_access_table aio_ctl_volatile_table = {
	.yes_ranges = aio_ctl_volatile_ranges,
	.n_yes_ranges = ARRAY_SIZE(aio_ctl_volatile_ranges),
};

static const struct regmap_config aio_ctl_regmap_config = {
	.name = "aio_ctl",
	.reg_bits = 8,
	.reg_stride = 1,
	.reg_base = STX104_AIO_BASE,
	.val_bits = 8,
	.io_port = true,
	.wr_table = &aio_ctl_wr_table,
	.rd_table = &aio_ctl_rd_table,
	.volatile_table = &aio_ctl_volatile_table,
	.cache_type = REGCACHE_FLAT,
};

static const struct regmap_range aio_data_wr_ranges[] = {
	regmap_reg_range(0x4, 0x6),
};
static const struct regmap_range aio_data_rd_ranges[] = {
	regmap_reg_range(0x0, 0x0),
};
static const struct regmap_access_table aio_data_wr_table = {
	.yes_ranges = aio_data_wr_ranges,
	.n_yes_ranges = ARRAY_SIZE(aio_data_wr_ranges),
};
static const struct regmap_access_table aio_data_rd_table = {
	.yes_ranges = aio_data_rd_ranges,
	.n_yes_ranges = ARRAY_SIZE(aio_data_rd_ranges),
};

static const struct regmap_config aio_data_regmap_config = {
	.name = "aio_data",
	.reg_bits = 16,
	.reg_stride = STX104_AIO_DATA_STRIDE,
	.reg_base = STX104_AIO_BASE,
	.val_bits = 16,
	.io_port = true,
	.wr_table = &aio_data_wr_table,
	.rd_table = &aio_data_rd_table,
	.volatile_table = &aio_data_rd_table,
	.cache_type = REGCACHE_FLAT,
};

static const struct regmap_config dio_regmap_config = {
	.name = "dio",
	.reg_bits = 8,
	.reg_stride = 1,
	.reg_base = STX104_DIO_REG,
	.val_bits = 8,
	.io_port = true,
};

static const struct regmap_range pit_wr_ranges[] = {
	regmap_reg_range(0x0, 0x3),
};
static const struct regmap_range pit_rd_ranges[] = {
	regmap_reg_range(0x0, 0x2),
};
static const struct regmap_access_table pit_wr_table = {
	.yes_ranges = pit_wr_ranges,
	.n_yes_ranges = ARRAY_SIZE(pit_wr_ranges),
};
static const struct regmap_access_table pit_rd_table = {

Annotation

Implementation Notes