drivers/iio/dac/ad5755.c

Source file repositories/reference/linux-study-clean/drivers/iio/dac/ad5755.c

File Facts

System
Linux kernel
Corpus path
drivers/iio/dac/ad5755.c
Extension
.c
Size
23480 bytes
Lines
883
Domain
Driver Families
Bucket
drivers/iio
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct ad5755_platform_data {
	bool ext_dc_dc_compenstation_resistor;
	enum ad5755_dc_dc_phase dc_dc_phase;
	enum ad5755_dc_dc_freq dc_dc_freq;
	enum ad5755_dc_dc_maxv dc_dc_maxv;

	struct {
		enum ad5755_mode mode;
		bool ext_current_sense_resistor;
		bool enable_voltage_overrange;
		struct {
			bool enable;
			enum ad5755_slew_rate rate;
			enum ad5755_slew_step_size step_size;
		} slew;
	} dac[4];
};

/**
 * struct ad5755_chip_info - chip specific information
 * @channel_template:	channel specification
 * @calib_shift:	shift for the calibration data registers
 * @has_voltage_out:	whether the chip has voltage outputs
 */
struct ad5755_chip_info {
	const struct iio_chan_spec channel_template;
	unsigned int calib_shift;
	bool has_voltage_out;
};

/**
 * struct ad5755_state - driver instance specific data
 * @spi:	spi device the driver is attached to
 * @chip_info:	chip model specific constants, available modes etc
 * @pwr_down:	bitmask which contains  hether a channel is powered down or not
 * @ctrl:	software shadow of the channel ctrl registers
 * @channels:	iio channel spec for the device
 * @lock:	lock to protect the data buffer during SPI ops
 * @data:	spi transfer buffers
 */
struct ad5755_state {
	struct spi_device		*spi;
	const struct ad5755_chip_info	*chip_info;
	unsigned int			pwr_down;
	unsigned int			ctrl[AD5755_NUM_CHANNELS];
	struct iio_chan_spec		channels[AD5755_NUM_CHANNELS];
	struct mutex			lock;

	/*
	 * DMA (thus cache coherency maintenance) may require the
	 * transfer buffers to live in their own cache lines.
	 */

	union {
		__be32 d32;
		u8 d8[4];
	} data[2] __aligned(IIO_DMA_MINALIGN);
};

enum ad5755_type {
	ID_AD5755,
	ID_AD5757,
	ID_AD5735,
	ID_AD5737,
};

static const int ad5755_dcdc_freq_table[][2] = {
	{ 250000, AD5755_DC_DC_FREQ_250kHZ },
	{ 410000, AD5755_DC_DC_FREQ_410kHZ },
	{ 650000, AD5755_DC_DC_FREQ_650kHZ }
};

static const int ad5755_dcdc_maxv_table[][2] = {
	{ 23000000, AD5755_DC_DC_MAXV_23V },
	{ 24500000, AD5755_DC_DC_MAXV_24V5 },
	{ 27000000, AD5755_DC_DC_MAXV_27V },
	{ 29500000, AD5755_DC_DC_MAXV_29V5 },
};

static const int ad5755_slew_rate_table[][2] = {
	{ 64000, AD5755_SLEW_RATE_64k },
	{ 32000, AD5755_SLEW_RATE_32k },
	{ 16000, AD5755_SLEW_RATE_16k },
	{ 8000, AD5755_SLEW_RATE_8k },
	{ 4000, AD5755_SLEW_RATE_4k },
	{ 2000, AD5755_SLEW_RATE_2k },
	{ 1000, AD5755_SLEW_RATE_1k },
	{ 500, AD5755_SLEW_RATE_500 },
	{ 250, AD5755_SLEW_RATE_250 },
	{ 125, AD5755_SLEW_RATE_125 },

Annotation

Implementation Notes