drivers/iio/frequency/adf4377.c

Source file repositories/reference/linux-study-clean/drivers/iio/frequency/adf4377.c

File Facts

System
Linux kernel
Corpus path
drivers/iio/frequency/adf4377.c
Extension
.c
Size
30878 bytes
Lines
1126
Domain
Driver Families
Bucket
drivers/iio
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct adf4377_chip_info {
	const char *name;
	bool has_gpio_enclk2;
};

struct adf4377_state {
	const struct adf4377_chip_info	*chip_info;
	struct spi_device	*spi;
	struct regmap		*regmap;
	struct clk		*clkin;
	/* Protect against concurrent accesses to the device and data content */
	struct mutex		lock;
	struct notifier_block	nb;
	/* Reference Divider */
	unsigned int		ref_div_factor;
	/* PFD Frequency */
	unsigned int		f_pfd;
	/* Input Reference Clock */
	unsigned int		clkin_freq;
	/* CLKOUT Divider */
	u8			clkout_div_sel;
	/* Feedback Divider (N) */
	u16			n_int;
	u16			synth_lock_timeout;
	u16			vco_alc_timeout;
	u16			adc_clk_div;
	u16			vco_band_div;
	u8			dclk_div1;
	u8			dclk_div2;
	u8			dclk_mode;
	unsigned int		f_div_rclk;
	enum muxout_select_mode	muxout_select;
	struct gpio_desc	*gpio_ce;
	struct gpio_desc	*gpio_enclk1;
	struct gpio_desc	*gpio_enclk2;
	struct clk		*clk;
	struct clk		*clkout;
	struct clk_hw		hw;
	u8			buf[2] __aligned(IIO_DMA_MINALIGN);
};

#define to_adf4377_state(h)	container_of(h, struct adf4377_state, hw)

static const char * const adf4377_muxout_modes[] = {
	[ADF4377_MUXOUT_HIGH_Z] = "high_z",
	[ADF4377_MUXOUT_LKDET] = "lock_detect",
	[ADF4377_MUXOUT_LOW] = "muxout_low",
	[ADF4377_MUXOUT_DIV_RCLK_2] = "f_div_rclk_2",
	[ADF4377_MUXOUT_DIV_NCLK_2] = "f_div_nclk_2",
	[ADF4377_MUXOUT_HIGH] = "muxout_high",
};

static const struct reg_sequence adf4377_reg_defaults[] = {
	{ 0x42,  ADF4377_0042_R042_RSV1 },
	{ 0x3B,  ADF4377_003B_R03B_RSV1 },
	{ 0x3A,  ADF4377_003A_R03A_RSV1 },
	{ 0x34,  ADF4377_0034_R034_RSV1 },
	{ 0x33,  ADF4377_0033_R033_RSV1 },
	{ 0x32,  ADF4377_0032_R032_RSV1 },
	{ 0x31,  ADF4377_0031_R031_RSV1 },
	{ 0x2C,  ADF4377_002C_R02C_RSV1 },
	{ 0x25,  ADF4377_0025_R025_RSV1 },
	{ 0x23,  ADF4377_0023_R023_RSV1 },
	{ 0x22,  ADF4377_0022_R022_RSV1 },
	{ 0x21,  ADF4377_0021_R021_RSV1 },
	{ 0x1f,  ADF4377_001F_R01F_RSV1 },
	{ 0x1c,  ADF4377_001C_R01C_RSV1 },
};

static const struct regmap_config adf4377_regmap_config = {
	.reg_bits = 16,
	.val_bits = 8,
	.read_flag_mask = BIT(7),
	.max_register = 0x54,
};

static int adf4377_reg_access(struct iio_dev *indio_dev,
			      unsigned int reg,
			      unsigned int write_val,
			      unsigned int *read_val)
{
	struct adf4377_state *st = iio_priv(indio_dev);

	if (read_val)
		return regmap_read(st->regmap, reg, read_val);

	return regmap_write(st->regmap, reg, write_val);
}

static const struct iio_info adf4377_info = {

Annotation

Implementation Notes