drivers/iio/imu/bmi323/bmi323.h

Source file repositories/reference/linux-study-clean/drivers/iio/imu/bmi323/bmi323.h

File Facts

System
Linux kernel
Corpus path
drivers/iio/imu/bmi323/bmi323.h
Extension
.h
Size
7282 bytes
Lines
210
Domain
Driver Families
Bucket
drivers/iio
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _BMI323_H_
#define _BMI323_H_

#include <linux/bits.h>
#include <linux/regmap.h>
#include <linux/units.h>

#define BMI323_I2C_DUMMY			2
#define BMI323_SPI_DUMMY			1

/* Register map */

#define BMI323_CHIP_ID_REG			0x00
#define BMI323_CHIP_ID_VAL			0x0043
#define BMI323_CHIP_ID_MSK			GENMASK(7, 0)
#define BMI323_ERR_REG				0x01
#define BMI323_STATUS_REG			0x02
#define BMI323_STATUS_POR_MSK			BIT(0)

/* Accelero/Gyro/Temp data registers */
#define BMI323_ACCEL_X_REG			0x03
#define BMI323_GYRO_X_REG			0x06
#define BMI323_TEMP_REG				0x09
#define BMI323_ALL_CHAN_MSK			GENMASK(5, 0)

/* Status registers */
#define BMI323_STATUS_INT1_REG			0x0D
#define BMI323_STATUS_INT2_REG			0x0E
#define BMI323_STATUS_NOMOTION_MSK		BIT(0)
#define BMI323_STATUS_MOTION_MSK		BIT(1)
#define BMI323_STATUS_STP_WTR_MSK		BIT(5)
#define BMI323_STATUS_TAP_MSK			BIT(8)
#define BMI323_STATUS_ERROR_MSK			BIT(10)
#define BMI323_STATUS_TMP_DRDY_MSK		BIT(11)
#define BMI323_STATUS_GYR_DRDY_MSK		BIT(12)
#define BMI323_STATUS_ACC_DRDY_MSK		BIT(13)
#define BMI323_STATUS_ACC_GYR_DRDY_MSK		GENMASK(13, 12)
#define BMI323_STATUS_FIFO_WTRMRK_MSK		BIT(14)
#define BMI323_STATUS_FIFO_FULL_MSK		BIT(15)

/* Feature registers */
#define BMI323_FEAT_IO0_REG			0x10
#define BMI323_FEAT_IO0_XYZ_NOMOTION_MSK	GENMASK(2, 0)
#define BMI323_FEAT_IO0_XYZ_MOTION_MSK		GENMASK(5, 3)
#define BMI323_FEAT_XYZ_MSK			GENMASK(2, 0)
#define BMI323_FEAT_IO0_STP_CNT_MSK		BIT(9)
#define BMI323_FEAT_IO0_S_TAP_MSK		BIT(12)
#define BMI323_FEAT_IO0_D_TAP_MSK		BIT(13)
#define BMI323_FEAT_IO1_REG			0x11
#define BMI323_FEAT_IO1_ERR_MSK			GENMASK(3, 0)
#define BMI323_FEAT_IO2_REG			0x12
#define BMI323_FEAT_IO_STATUS_REG		0x14
#define BMI323_FEAT_IO_STATUS_MSK		BIT(0)
#define BMI323_FEAT_ENG_POLL			2000
#define BMI323_FEAT_ENG_TIMEOUT			10000

/* FIFO registers */
#define BMI323_FIFO_FILL_LEVEL_REG		0x15
#define BMI323_FIFO_DATA_REG			0x16

/* Accelero/Gyro config registers */
#define BMI323_ACC_CONF_REG			0x20
#define BMI323_GYRO_CONF_REG			0x21
#define BMI323_ACC_GYRO_CONF_MODE_MSK		GENMASK(14, 12)
#define BMI323_ACC_GYRO_CONF_ODR_MSK		GENMASK(3, 0)
#define BMI323_ACC_GYRO_CONF_SCL_MSK		GENMASK(6, 4)
#define BMI323_ACC_GYRO_CONF_BW_MSK		BIT(7)
#define BMI323_ACC_GYRO_CONF_AVG_MSK		GENMASK(10, 8)

/* FIFO registers */
#define BMI323_FIFO_WTRMRK_REG			0x35
#define BMI323_FIFO_CONF_REG			0x36
#define BMI323_FIFO_CONF_STP_FUL_MSK		BIT(0)
#define BMI323_FIFO_CONF_ACC_GYR_EN_MSK		GENMASK(10, 9)
#define BMI323_FIFO_ACC_GYR_MSK			GENMASK(1, 0)
#define BMI323_FIFO_CTRL_REG			0x37
#define BMI323_FIFO_FLUSH_MSK			BIT(0)

/* Interrupt pin config registers */
#define BMI323_IO_INT_CTR_REG			0x38
#define BMI323_IO_INT1_LVL_MSK			BIT(0)
#define BMI323_IO_INT1_OD_MSK			BIT(1)
#define BMI323_IO_INT1_OP_EN_MSK		BIT(2)
#define BMI323_IO_INT1_LVL_OD_OP_MSK		GENMASK(2, 0)
#define BMI323_IO_INT2_LVL_MSK			BIT(8)
#define BMI323_IO_INT2_OD_MSK			BIT(9)
#define BMI323_IO_INT2_OP_EN_MSK		BIT(10)
#define BMI323_IO_INT2_LVL_OD_OP_MSK		GENMASK(10, 8)
#define BMI323_IO_INT_CONF_REG			0x39
#define BMI323_IO_INT_LTCH_MSK			BIT(0)

Annotation

Implementation Notes