drivers/iio/light/gp2ap020a00f.c
Source file repositories/reference/linux-study-clean/drivers/iio/light/gp2ap020a00f.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/iio/light/gp2ap020a00f.c- Extension
.c- Size
- 45466 bytes
- Lines
- 1553
- Domain
- Driver Families
- Bucket
- drivers/iio
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/cleanup.hlinux/debugfs.hlinux/delay.hlinux/i2c.hlinux/interrupt.hlinux/irq.hlinux/irq_work.hlinux/minmax.hlinux/module.hlinux/mod_devicetable.hlinux/mutex.hlinux/regmap.hlinux/regulator/consumer.hlinux/slab.hlinux/unaligned.hlinux/iio/buffer.hlinux/iio/events.hlinux/iio/iio.hlinux/iio/sysfs.hlinux/iio/trigger.hlinux/iio/trigger_consumer.hlinux/iio/triggered_buffer.h
Detected Declarations
struct gp2ap020a00f_dataenum gp2ap020a00f_opmodeenum gp2ap020a00f_cmdenum gp2ap020a00f_flagsenum gp2ap020a00f_thresh_val_idfunction gp2ap020a00f_is_volatile_regfunction gp2ap020a00f_set_operation_modefunction gp2ap020a00f_als_enabledfunction gp2ap020a00f_prox_detect_enabledfunction gp2ap020a00f_write_event_thresholdfunction gp2ap020a00f_alter_opmodefunction gp2ap020a00f_exec_cmdfunction wait_conversion_complete_irqfunction gp2ap020a00f_read_outputfunction gp2ap020a00f_adjust_lux_modefunction gp2ap020a00f_output_to_luxfunction gp2ap020a00f_iio_trigger_workfunction gp2ap020a00f_prox_sensing_handlerfunction gp2ap020a00f_thresh_event_handlerfunction gp2ap020a00f_trigger_handlerfunction iio_for_each_active_channelfunction gp2ap020a00f_get_thresh_regfunction gp2ap020a00f_write_event_valfunction gp2ap020a00f_read_event_valfunction gp2ap020a00f_write_prox_event_configfunction gp2ap020a00f_write_event_configfunction gp2ap020a00f_read_event_configfunction gp2ap020a00f_read_channelfunction gp2ap020a00f_read_rawfunction gp2ap020a00f_buffer_postenablefunction D1function gp2ap020a00f_buffer_predisablefunction iio_for_each_active_channelfunction gp2ap020a00f_probefunction gp2ap020a00f_remove
Annotated Snippet
struct gp2ap020a00f_data {
struct i2c_client *client;
struct mutex lock;
char *buffer;
struct regulator *vled_reg;
unsigned long flags;
enum gp2ap020a00f_opmode cur_opmode;
struct iio_trigger *trig;
struct regmap *regmap;
unsigned int thresh_val[4];
struct irq_work work;
wait_queue_head_t data_ready_queue;
};
static const u8 gp2ap020a00f_reg_init_tab[] = {
[GP2AP020A00F_OP_REG] = GP2AP020A00F_OP3_SHUTDOWN,
[GP2AP020A00F_ALS_REG] = GP2AP020A00F_RES_A_25ms |
GP2AP020A00F_RANGE_A_x8,
[GP2AP020A00F_PS_REG] = GP2AP020A00F_ALC_ON |
GP2AP020A00F_RES_P_1_56ms_x2 |
GP2AP020A00F_RANGE_P_x4,
[GP2AP020A00F_LED_REG] = GP2AP020A00F_INTVAL_0 |
GP2AP020A00F_IS_110mA |
GP2AP020A00F_FREQ_327_5kHz,
[GP2AP020A00F_TL_L_REG] = 0,
[GP2AP020A00F_TL_H_REG] = 0,
[GP2AP020A00F_TH_L_REG] = 0,
[GP2AP020A00F_TH_H_REG] = 0,
[GP2AP020A00F_PL_L_REG] = 0,
[GP2AP020A00F_PL_H_REG] = 0,
[GP2AP020A00F_PH_L_REG] = 0,
[GP2AP020A00F_PH_H_REG] = 0,
};
static bool gp2ap020a00f_is_volatile_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case GP2AP020A00F_OP_REG:
case GP2AP020A00F_D0_L_REG:
case GP2AP020A00F_D0_H_REG:
case GP2AP020A00F_D1_L_REG:
case GP2AP020A00F_D1_H_REG:
case GP2AP020A00F_D2_L_REG:
case GP2AP020A00F_D2_H_REG:
return true;
default:
return false;
}
}
static const struct regmap_config gp2ap020a00f_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = GP2AP020A00F_D2_H_REG,
.cache_type = REGCACHE_RBTREE,
.volatile_reg = gp2ap020a00f_is_volatile_reg,
};
static const struct gp2ap020a00f_mutable_config_regs {
u8 op_reg;
u8 als_reg;
u8 ps_reg;
u8 led_reg;
} opmode_regs_settings[GP2AP020A00F_NUM_OPMODES] = {
[GP2AP020A00F_OPMODE_READ_RAW_CLEAR] = {
GP2AP020A00F_OP_ALS | GP2AP020A00F_OP2_CONT_OPERATION
| GP2AP020A00F_OP3_OPERATION
| GP2AP020A00F_TYPE_AUTO_CALC,
GP2AP020A00F_PRST_ONCE,
GP2AP020A00F_INTTYPE_LEVEL,
GP2AP020A00F_PIN_ALS
},
[GP2AP020A00F_OPMODE_READ_RAW_IR] = {
GP2AP020A00F_OP_ALS | GP2AP020A00F_OP2_CONT_OPERATION
| GP2AP020A00F_OP3_OPERATION
| GP2AP020A00F_TYPE_MANUAL_CALC,
GP2AP020A00F_PRST_ONCE,
GP2AP020A00F_INTTYPE_LEVEL,
GP2AP020A00F_PIN_ALS
},
[GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY] = {
GP2AP020A00F_OP_PS | GP2AP020A00F_OP2_CONT_OPERATION
| GP2AP020A00F_OP3_OPERATION
| GP2AP020A00F_TYPE_MANUAL_CALC,
GP2AP020A00F_PRST_ONCE,
GP2AP020A00F_INTTYPE_LEVEL,
GP2AP020A00F_PIN_PS
},
Annotation
- Immediate include surface: `linux/cleanup.h`, `linux/debugfs.h`, `linux/delay.h`, `linux/i2c.h`, `linux/interrupt.h`, `linux/irq.h`, `linux/irq_work.h`, `linux/minmax.h`.
- Detected declarations: `struct gp2ap020a00f_data`, `enum gp2ap020a00f_opmode`, `enum gp2ap020a00f_cmd`, `enum gp2ap020a00f_flags`, `enum gp2ap020a00f_thresh_val_id`, `function gp2ap020a00f_is_volatile_reg`, `function gp2ap020a00f_set_operation_mode`, `function gp2ap020a00f_als_enabled`, `function gp2ap020a00f_prox_detect_enabled`, `function gp2ap020a00f_write_event_threshold`.
- Atlas domain: Driver Families / drivers/iio.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.