drivers/iio/potentiometer/max5432.c
Source file repositories/reference/linux-study-clean/drivers/iio/potentiometer/max5432.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/iio/potentiometer/max5432.c- Extension
.c- Size
- 3334 bytes
- Lines
- 134
- Domain
- Driver Families
- Bucket
- drivers/iio
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/i2c.hlinux/iio/iio.hlinux/limits.hlinux/module.hlinux/mod_devicetable.hlinux/property.h
Detected Declarations
struct max5432_datafunction max5432_read_rawfunction max5432_write_rawfunction max5432_probe
Annotated Snippet
struct max5432_data {
struct i2c_client *client;
unsigned long ohm;
};
static const struct iio_chan_spec max5432_channels[] = {
{
.type = IIO_RESISTANCE,
.indexed = 1,
.output = 1,
.channel = 0,
.address = MAX5432_CMD_VREG,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
}
};
static int max5432_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct max5432_data *data = iio_priv(indio_dev);
if (mask != IIO_CHAN_INFO_SCALE)
return -EINVAL;
if (unlikely(data->ohm > INT_MAX))
return -ERANGE;
*val = data->ohm;
*val2 = MAX5432_MAX_POS;
return IIO_VAL_FRACTIONAL;
}
static int max5432_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct max5432_data *data = iio_priv(indio_dev);
u8 data_byte;
if (mask != IIO_CHAN_INFO_RAW)
return -EINVAL;
if (val < 0 || val > MAX5432_MAX_POS)
return -EINVAL;
if (val2 != 0)
return -EINVAL;
/* Wiper position is in bits D7-D3. (D2-D0 are don't care bits.) */
data_byte = val << 3;
return i2c_smbus_write_byte_data(data->client, chan->address,
data_byte);
}
static const struct iio_info max5432_info = {
.read_raw = max5432_read_raw,
.write_raw = max5432_write_raw,
};
static int max5432_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct iio_dev *indio_dev;
struct max5432_data *data;
indio_dev = devm_iio_device_alloc(dev, sizeof(struct max5432_data));
if (!indio_dev)
return -ENOMEM;
i2c_set_clientdata(client, indio_dev);
data = iio_priv(indio_dev);
data->client = client;
data->ohm = (unsigned long)device_get_match_data(dev);
indio_dev->info = &max5432_info;
indio_dev->channels = max5432_channels;
indio_dev->num_channels = ARRAY_SIZE(max5432_channels);
indio_dev->name = client->name;
return devm_iio_device_register(dev, indio_dev);
}
static const struct of_device_id max5432_dt_ids[] = {
{ .compatible = "maxim,max5432", .data = (void *)MAX5432_OHM_50K },
{ .compatible = "maxim,max5433", .data = (void *)MAX5432_OHM_100K },
{ .compatible = "maxim,max5434", .data = (void *)MAX5432_OHM_50K },
Annotation
- Immediate include surface: `linux/i2c.h`, `linux/iio/iio.h`, `linux/limits.h`, `linux/module.h`, `linux/mod_devicetable.h`, `linux/property.h`.
- Detected declarations: `struct max5432_data`, `function max5432_read_raw`, `function max5432_write_raw`, `function max5432_probe`.
- Atlas domain: Driver Families / drivers/iio.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.