drivers/iio/proximity/hx9023s.c

Source file repositories/reference/linux-study-clean/drivers/iio/proximity/hx9023s.c

File Facts

System
Linux kernel
Corpus path
drivers/iio/proximity/hx9023s.c
Extension
.c
Size
32809 bytes
Lines
1228
Domain
Driver Families
Bucket
drivers/iio
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct hx9023s_bin {
	u16 reg_count;
	u16 fw_size;
	u8 fw_ver;
	u8 data[] __counted_by(fw_size);
};

struct hx9023s_ch_data {
	s16 raw; /* Raw Data*/
	s16 lp; /* Low Pass Filter Data*/
	s16 bl; /* Base Line Data */
	s16 diff; /* Difference of Low Pass Data and Base Line Data */

	struct {
		unsigned int near;
		unsigned int far;
	} thres;

	u16 dac;
	u8 channel_positive;
	u8 channel_negative;
	bool sel_bl;
	bool sel_raw;
	bool sel_diff;
	bool sel_lp;
	bool enable;
};

struct hx9023s_data {
	struct iio_trigger *trig;
	struct regmap *regmap;
	unsigned long chan_prox_stat;
	unsigned long chan_read;
	unsigned long chan_event;
	unsigned long ch_en_stat;
	unsigned long chan_in_use;
	unsigned int prox_state_reg;
	bool trigger_enabled;

	struct {
		__le16 channels[HX9023S_CH_NUM];
		aligned_s64 ts;
	} buffer;

	/*
	 * Serialize access to registers below:
	 * HX9023S_PROX_INT_LOW_CFG,
	 * HX9023S_PROX_INT_HIGH_CFG,
	 * HX9023S_INTERRUPT_CFG,
	 * HX9023S_CH_NUM_CFG
	 * Serialize access to channel configuration in
	 * hx9023s_push_events and hx9023s_trigger_handler.
	 */
	struct mutex mutex;
	struct hx9023s_ch_data ch_data[HX9023S_CH_NUM];
};

static const struct reg_sequence hx9023s_reg_init_list[] = {
	/* scan period */
	REG_SEQ0(HX9023S_PRF_CFG, 0x17),

	/* full scale of conversion phase of each channel */
	REG_SEQ0(HX9023S_RANGE_7_0, 0x11),
	REG_SEQ0(HX9023S_RANGE_9_8, 0x02),
	REG_SEQ0(HX9023S_RANGE_18_16, 0x00),

	/* ADC average number and OSR number of each channel */
	REG_SEQ0(HX9023S_AVG0_NOSR0_CFG, 0x71),
	REG_SEQ0(HX9023S_NOSR12_CFG, 0x44),
	REG_SEQ0(HX9023S_NOSR34_CFG, 0x00),
	REG_SEQ0(HX9023S_AVG12_CFG, 0x33),
	REG_SEQ0(HX9023S_AVG34_CFG, 0x00),

	/* sample & integration frequency of the ADC */
	REG_SEQ0(HX9023S_SAMPLE_NUM_7_0, 0x65),
	REG_SEQ0(HX9023S_INTEGRATION_NUM_7_0, 0x65),

	/* coefficient of the first order low pass filter during each channel */
	REG_SEQ0(HX9023S_LP_ALP_1_0_CFG, 0x22),
	REG_SEQ0(HX9023S_LP_ALP_3_2_CFG, 0x22),
	REG_SEQ0(HX9023S_LP_ALP_4_CFG, 0x02),

	/* up coefficient of the first order low pass filter during each channel */
	REG_SEQ0(HX9023S_UP_ALP_1_0_CFG, 0x88),
	REG_SEQ0(HX9023S_UP_ALP_3_2_CFG, 0x88),
	REG_SEQ0(HX9023S_DN_UP_ALP_0_4_CFG, 0x18),

	/* down coefficient of the first order low pass filter during each channel */
	REG_SEQ0(HX9023S_DN_ALP_2_1_CFG, 0x11),
	REG_SEQ0(HX9023S_DN_ALP_4_3_CFG, 0x11),

Annotation

Implementation Notes